9bba902c83
Remove non-DebugLoc versions of BuildMI from X86.
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There were some that might even matter in X86FastISel.
llvm-svn: 64437
2009-02-13 02:33:27 +00:00
e5ade4a9a1
Implement FpSET_ST1_*.
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llvm-svn: 64186
2009-02-09 23:32:07 +00:00
0d1e9a8e04
Switch the MachineOperand accessors back to the short names like
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isReg, etc., from isRegister, etc.
llvm-svn: 57006
2008-10-03 15:45:36 +00:00
962c2cf17a
Instead of setPreservesAll, just mark them preseving machine loop info and machine dominators.
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llvm-svn: 56475
2008-09-22 22:21:38 +00:00
168f8f3916
Mark several codegen passes as preserving all analysis.
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llvm-svn: 56469
2008-09-22 20:58:04 +00:00
38453eebdc
Remove isImm(), isReg(), and friends, in favor of
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isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.
llvm-svn: 56189
2008-09-13 17:58:21 +00:00
a79db30d28
Tidy up several unbeseeming casts from pointer to intptr_t.
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llvm-svn: 55779
2008-09-04 17:05:41 +00:00
1b351d42bb
Remove more uses of std::set.
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llvm-svn: 54787
2008-08-14 21:01:00 +00:00
fa374ca223
Eliminate a compilation warning.
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llvm-svn: 53873
2008-07-21 20:02:45 +00:00
3b46030375
Pool-allocation for MachineInstrs, MachineBasicBlocks, and
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MachineMemOperands. The pools are owned by MachineFunctions.
This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.
llvm-svn: 53212
2008-07-07 23:14:23 +00:00
c55b444a8f
Restore this assert now that the livevar bug is fixed.
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This verifies kill info for "ret" fp operands is right.
llvm-svn: 48656
2008-03-21 20:41:27 +00:00
68b11e14bc
remove Evan's "ugly hack" that sorta attempted to get
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x86-64 return conventions correct, but was never enabled.
We can now do the "right thing" with multiple return values.
llvm-svn: 48635
2008-03-21 06:50:21 +00:00
5abbe6cef5
Add support for calls that return two FP values in
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ST(0)/ST(1).
llvm-svn: 48634
2008-03-21 06:38:26 +00:00
7e59a30e9f
disable a bogus assertion.
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llvm-svn: 48633
2008-03-21 06:01:05 +00:00
b6f04a3e0a
Enable support for returning two long-double values in ST(0)/ST(1).
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This allows us to compile fp-stack-2results.ll into:
_test:
fldz
fld1
ret
which returns 1 in ST(0) and 0 in ST(1). This is needed for x86-64
_Complex long double.
llvm-svn: 48632
2008-03-21 05:57:20 +00:00
8abed80a69
Implement basic support for the 'f' register class constraint. This basically
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works, but probably won't if you mix it with 't' or 'u' yet.
llvm-svn: 48243
2008-03-11 19:50:13 +00:00
a3860a2422
Fix the build on gcc 4.2.
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llvm-svn: 48212
2008-03-11 05:56:09 +00:00
1bd44363f2
Change the model for FP Stack return to use fp operands on the
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RET instruction instead of using FpSET_ST0_32. This also generalizes
the code to handling returning of multiple FP results.
llvm-svn: 48209
2008-03-11 03:23:40 +00:00
4c869594bc
rename FP_SETRESULT -> FP_SET_ST0
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llvm-svn: 48094
2008-03-09 07:08:44 +00:00
d587e580a6
rename FpGETRESULT32 -> FpGET_ST0_32 etc. Add support for
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isel'ing value preserving FP roundings from one fp stack reg to another
into a noop, instead of stack traffic.
llvm-svn: 48093
2008-03-09 07:05:32 +00:00
6325446666
Refactor code. Remove duplicated functions that basically do the same thing as
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findRegisterUseOperandIdx, findRegisterDefOperandIndx. Fix some naming inconsistencies.
llvm-svn: 47927
2008-03-05 00:59:57 +00:00
084a1cdcdd
Work in progress. This patch *fixes* x86-64 calls which are modelled as StructRet but really should be return in registers, e.g. _Complex long double, some 128-bit aggregates. This is a short term solution that is necessary only because llvm, for now, cannot model i128 nor call's with multiple results.
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Status: This only works for direct calls, and only the caller side is done. Disabled for now.
llvm-svn: 46527
2008-01-29 19:34:22 +00:00
3c43efc9d1
Improve the FP stackifier to decide all on its own whether
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an instruction kills a register or not. This is cheap and
easy to do now that instructions record this on their flags,
and this eliminates the second pass of LiveVariables from the
x86 backend. This speeds up a release llc by ~2.5%.
llvm-svn: 45955
2008-01-14 06:41:29 +00:00
596875118c
rename MachineInstr::setInstrDescriptor -> setDesc
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llvm-svn: 45871
2008-01-11 18:10:50 +00:00
03ad885039
rename TargetInstrDescriptor -> TargetInstrDesc.
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Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.
llvm-svn: 45695
2008-01-07 07:27:27 +00:00
b0d06b4381
Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor
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llvm-svn: 45680
2008-01-07 03:13:06 +00:00
a98c679de0
Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
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that it is cheap and efficient to get.
Move a variety of predicates from TargetInstrInfo into
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around. Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.
Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.
llvm-svn: 45674
2008-01-07 01:56:04 +00:00
a10fff51d9
Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
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that "machine" classes are used to represent the current state of
the code being compiled. Given this expanded name, we can start
moving other stuff into it. For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.
Update all the clients to match.
This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.
llvm-svn: 45467
2007-12-31 04:13:23 +00:00
f3ebc3f3d2
Remove attribution from file headers, per discussion on llvmdev.
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llvm-svn: 45418
2007-12-29 20:36:04 +00:00
5fb5a1f389
Enabling new condition code modeling scheme.
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llvm-svn: 42459
2007-09-29 00:00:36 +00:00
8ee1ecfc50
New style x87 cmp instructions.
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llvm-svn: 42312
2007-09-25 19:08:02 +00:00
e95f391ef1
Added support for new condition code modeling scheme (i.e. physical register dependency). These are a bunch of instructions that are duplicated so the x86 backend can support both the old and new schemes at the same time. They will be deleted after
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all the kinks are worked out.
llvm-svn: 42285
2007-09-25 01:57:46 +00:00
95be037d67
another long double buglet
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llvm-svn: 42159
2007-09-20 01:27:54 +00:00
ff7e443792
Remove RSTRegClass case from loadRegFromStackSlot
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and storeRegToStackSlot. Evan and I concluded this
should never be needed and it appears to be true.
(It if is needed, adjustment would be needed for
long double to work.)
llvm-svn: 42049
2007-09-17 20:15:38 +00:00
9da02f5ee2
Remove isReg, isImm, and isMBB, and change all their users to use
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isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.
llvm-svn: 41958
2007-09-14 20:33:02 +00:00
1a11e1c14f
My compiler warns about the semicolon.
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llvm-svn: 41840
2007-09-11 12:30:25 +00:00
e2f23a3abf
Add lengthof and endof templates that hide a lot of sizeof computations.
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Patch by Sterling Stein!
llvm-svn: 41758
2007-09-07 04:06:50 +00:00
a47f7d7cfd
Long double patch 8 of N: make it partially work in
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SSE mode (all but conversions <-> other FP types, I think):
>>Do not mark all-80-bit operations as "Requires[FPStack]"
(which really means "not SSE").
>>Refactor load-and-extend to facilitate this.
>>Update comments.
>>Handle long double in SSE when computing FP_REG_KILL.
llvm-svn: 40906
2007-08-07 20:29:26 +00:00
57c6ac5fe5
Long double patch 7 of N, unless I lost count:).
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Last x87 bits for full functionality (not
thoroughly tested, and long doubles do not work
in SSE modes at all - use -mcpu=i486 for now)
llvm-svn: 40886
2007-08-07 01:17:37 +00:00
75169a82d6
Get X86 long double calling convention to work
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(on Darwin, anyway). Fix some table omissions for
LD arithmetic.
llvm-svn: 40877
2007-08-06 21:31:06 +00:00
e279fd6ce8
Make 80-bit store maintain simulated FP stack correctly.
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llvm-svn: 40868
2007-08-06 19:50:32 +00:00
b1888e73ad
Long double patch 4 of N: initial x87 implementation.
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Lots of problems yet but some simple things work.
llvm-svn: 40847
2007-08-05 18:49:15 +00:00
68471d263f
Fix fp_constant_op failure.
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llvm-svn: 38514
2007-07-10 21:53:30 +00:00
3d7008cd49
Refactor X87 instructions. As a side effect, all
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their names are changed.
llvm-svn: 37876
2007-07-04 21:07:47 +00:00
c2a6089b8b
Some spacing fixes. Cosmetic.
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llvm-svn: 37853
2007-07-03 17:07:33 +00:00
a2b3c175db
Fix for PR 1505 (and 1489). Rewrite X87 register
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model to include f32 variants. Some factoring
improvments forthcoming.
llvm-svn: 37847
2007-07-03 00:53:03 +00:00
8c78a0bff0
Drop 'const'
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llvm-svn: 36662
2007-05-03 01:11:54 +00:00
e95c6ad802
Use 'static const char' instead of 'static const int'.
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Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.
llvm-svn: 36652
2007-05-02 21:39:20 +00:00
09f162ca6a
Do not use typeinfo to identify pass in pass manager.
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llvm-svn: 36632
2007-05-01 21:15:47 +00:00
0ba174534c
Match MachineFunction::UsedPhysRegs changes.
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llvm-svn: 36452
2007-04-25 22:13:27 +00:00
Dale Johannesen