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407 Commits

Author SHA1 Message Date
Akira Hatanaka 719df2874c [mips] Add member field MipsFunctionInfo::IncomingArgSize which holds the size 
of the incoming argument area.

llvm-svn: 167312
 2012-11-02 21:03:58 +00:00
Akira Hatanaka 9c962c02e4 [mips] Allow tail-call optimization for vararg functions and functions which 
use the caller's stack.

llvm-svn: 167048
 2012-10-30 20:16:31 +00:00
Akira Hatanaka 4866fe14e2 Add code for saving formal argument information to MipsFunctionInfo. This 
information will be used by IsEligibleForTailCallOptimization to determine
whether a call can be tail-call optimized.

llvm-svn: 167043
 2012-10-30 19:37:25 +00:00
Akira Hatanaka 6233cf565f Add definition of function MipsTargetLowering::passArgOnStack which emits nodes 
for passing a function call argument on a stack.

llvm-svn: 167041
 2012-10-30 19:23:25 +00:00
Akira Hatanaka 8e50aba5f9 Do not do tail-call optimization if target is mips16. 
llvm-svn: 167039
 2012-10-30 19:07:58 +00:00
Reed Kotler aebb8b034c Expand all atomic ops for mips16. 
llvm-svn: 166935
 2012-10-29 16:16:54 +00:00
Akira Hatanaka 6a124a84dc [mips] Do not tail-call optimize vararg functions or functions with byval 
arguments.

This is rather conservative and should be fixed later to be more aggressive.

llvm-svn: 166851
 2012-10-27 00:56:56 +00:00
Akira Hatanaka 2c07f1f140 [mips] Make sure FuncArg doesn't advance when OrigArgIndex is the same as in the 
previous iteration.

llvm-svn: 166850
 2012-10-27 00:44:39 +00:00
Akira Hatanaka ac8c669985 Use the methods and classes that were added to simplify LowerCall and 
LowerFormalArguments in MipsTargetLowering.

No functionality change intended.

llvm-svn: 166846
 2012-10-27 00:29:43 +00:00
Akira Hatanaka 2a13402a66 Add method MipsTargetLowering::writeVarArgRegs which copies argument registers 
of vararg functions back to the stack.

llvm-svn: 166844
 2012-10-27 00:21:13 +00:00
Akira Hatanaka 35f55b1622 Add method MipsTargetLowering::passByValArg. 
This method emits nodes for passing byval arguments in registers and stack.
This has the same functionality as existing functions PassByValArg64 and
WriteByValArg which will be deleted later.

llvm-svn: 166843
 2012-10-27 00:16:36 +00:00
Akira Hatanaka 25dad19f0e Add method MipsTargetLowering::copyByValRegs. 
This method copies byval arguments passed in registers onto the stack and has
the same functionality as existing functions CopyMips64ByValRegs and
ReadByValArg which will be deleted later.

llvm-svn: 166841
 2012-10-27 00:10:18 +00:00
Akira Hatanaka 4a3711d077 Add class MipsCC which provides methods used to analyze formal and call 
arguments and inquire about calling convention information.

llvm-svn: 166840
 2012-10-26 23:56:38 +00:00
Akira Hatanaka e485c65642 Delete MipsFunctionInfo::InArgFIRange. 
llvm-svn: 166837
 2012-10-26 23:49:51 +00:00
Akira Hatanaka 868b3a333b [mips] Make sure sret argument is returned in register V0. 
llvm-svn: 166539
 2012-10-24 02:10:54 +00:00
Akira Hatanaka 0c7d131a7b [mips] Use 64-bit registers to return an sret pointer if target ABI is N64. 
llvm-svn: 166344
 2012-10-19 22:11:40 +00:00
Akira Hatanaka 90131ac26c [mips] Add code to do tail call optimization. 
Currently, it is enabled only if option "enable-mips-tail-calls" is given and
all of the callee's arguments are passed in registers.

llvm-svn: 166342
 2012-10-19 21:47:33 +00:00
Akira Hatanaka c046243488 [mips] Delete MipsFunctionInfo::MaxCallFrameSize which is no longer used. 
llvm-svn: 166339
 2012-10-19 21:18:38 +00:00
Akira Hatanaka 91318df0cc Add node and enum for mips tail call. 
llvm-svn: 166318
 2012-10-19 20:59:39 +00:00
Akira Hatanaka 9c8dcfc73a Implement MipsTargetLowering::CanLowerReturn. 
Patch by Sasa Stankovic. 

llvm-svn: 165585
 2012-10-10 01:27:09 +00:00
Reed Kotler 240322140e Patch for integer multiply, signed/unsigned, long/long long. 
llvm-svn: 165322
 2012-10-05 18:27:54 +00:00
Akira Hatanaka e4bd054f98 MIPS DSP: Branch on Greater Than or Equal To Value 32 in DSPControl Pos Field instruction. 
llvm-svn: 164751
 2012-09-27 02:15:57 +00:00
Akira Hatanaka 9061a46443 MIPS DSP: all the remaining instructions which read or write accumulators. 
llvm-svn: 164750
 2012-09-27 02:11:20 +00:00
Akira Hatanaka 1babeaa44c MIPS DSP: add support for extract-word instructions. 
llvm-svn: 164749
 2012-09-27 02:05:42 +00:00
Akira Hatanaka fabb8cf421 Add MIPS DSP register classes. Set actions of DSP vector operations and override 
TargetLowering's callback functions.

llvm-svn: 164431
 2012-09-21 23:58:31 +00:00
Akira Hatanaka 233ac53a3f SelectionDAG node enums for MIPS DSP nodes. 
llvm-svn: 164430
 2012-09-21 23:52:47 +00:00
Akira Hatanaka 189d0adde9 Handled unaligned load/stores properly in Mips16 
Patch by Reed Kotler.

llvm-svn: 163956
 2012-09-15 01:02:03 +00:00
Akira Hatanaka 92a96e1da4 Misc. 
1. Remove RA from list of allocatable registers
2. Enable d,y,r constraint inline assembly instructions

Patch by Reed Kotler.

llvm-svn: 163753
 2012-09-12 23:27:55 +00:00
Michael Liao abb87d4857 Fix PR11985 
- BlockAddress has no support of BA + offset form and there is no way to
  propagate that offset into machine operand;
- Add BA + offset support and a new interface 'getTargetBlockAddress' to
  simplify target block address forming;
- All targets are modified to use new interface and X86 backend is enhanced to
  support BA + offset addressing.

llvm-svn: 163743
 2012-09-12 21:43:09 +00:00
Roman Divacky ad06cee239 Stop casting away const qualifier needlessly. 
llvm-svn: 163258
 2012-09-05 22:26:57 +00:00
Akira Hatanaka ad4950258b Add register Mips::GP to the list of reserved registers if target is bare-metal 
to prevent it from being clobbered. mips uses $gp to access small data section.

This bug was originally reported by Carl Norum.

llvm-svn: 162340
 2012-08-22 03:18:13 +00:00
Akira Hatanaka 33a25af5a8 Expand DYNAMIC_STACKALLOC nodes rather than doing custom-lowering. 
The frame object which points to the dynamically allocated area will not be
needed after changes are made to cease reserving call frames.

llvm-svn: 161076
 2012-07-31 20:54:48 +00:00
Akira Hatanaka beda2241a4 When store nodes or memcpy nodes are created to copy the function call 
arguments to the stack in MipsISelLowering::LowerCall, use stack pointer and
integer offset operands rather than frame object operands.

llvm-svn: 161068
 2012-07-31 18:46:41 +00:00
Akira Hatanaka 4ce7c4060d Fix type of LUXC1 and SUXC1. These instructions were incorrectly defined as 
single-precision load and store.

Also avoid selecting LUXC1 and SUXC1 instructions during isel. It is incorrect
to map unaligned floating point load/store nodes to these instructions.

llvm-svn: 161063
 2012-07-31 18:16:49 +00:00
Akira Hatanaka 97ba7696f8 Pass the correct call frame size to callseq_start node. This is needed to 
replace uses of function getMaxCallFrameSize defined in MipsFunctionInfo with
the one MachineFrameInfo has.

llvm-svn: 160841
 2012-07-26 23:27:01 +00:00
Akira Hatanaka 64626fc20f Fix call setup for PIC. 
Patch by Reed Kotler.

llvm-svn: 160774
 2012-07-26 02:24:43 +00:00
Akira Hatanaka 26e9ecb7a3 Add basic ability to setup call frame, and make procedure calls. 
Hello world will compile and execute with this patch.

Patch by Reed Kotler.

llvm-svn: 160651
 2012-07-23 23:45:54 +00:00
Akira Hatanaka b49c68a65d Revert accidental commit. 
llvm-svn: 160598
 2012-07-21 02:20:33 +00:00
Akira Hatanaka f73e362758 Add VK_Mips_HIGHER and VK_Mips_HIGHEST to MCSymbolRefExpr::VariantKind. 
Test case will be added later when long branch patch is checked in.

llvm-svn: 160597
 2012-07-21 02:15:19 +00:00
Akira Hatanaka 24cf4e36e5 Implement MipsTargetLowering::LowerSELECT_CC to custom lower SELECT_CC. 
llvm-svn: 160064
 2012-07-11 19:32:27 +00:00
Akira Hatanaka 878ad8b28d Lower RETURNADDR node in Mips backend. 
Patch by Sasa Stankovic.

llvm-svn: 160031
 2012-07-11 00:53:32 +00:00
Akira Hatanaka efff7b763b Make register Mips::RA allocatable if not in mips16 mode. 
llvm-svn: 159971
 2012-07-10 00:19:06 +00:00
Jack Carter b353094f27 mips32 long long register inline asm constraint support. 
inlineasm-cnstrnt-bad-r-1.ll is NOT supposed to fail, so it was removed.    This resulted in the removal of a negative test (inlineasm-cnstrnt-bad-r-1.ll)
    

llvm-svn: 159625
 2012-07-02 23:35:23 +00:00
Eric Christopher dfc3e68c40 Revert " mips32 long long register inline asm constraint support." as 
it appears to be breaking the bots.

This reverts commit 1b055ce320fa13f6f1ac81670d11b45e01f79876.

llvm-svn: 159619
 2012-07-02 23:22:25 +00:00
Jack Carter 5c1a01a625 mips32 long long register inline asm constraint support. 
inlineasm-cnstrnt-bad-r-1.ll is NOT supposed to fail, so it was removed.    This resulted in the removal of a negative test (inlineasm-cnstrnt-bad-r-1.ll)
    

llvm-svn: 159610
 2012-07-02 22:39:45 +00:00
Akira Hatanaka 5fd22485a3 Fix coding style violations. Remove white spaces and tabs. 
llvm-svn: 158471
 2012-06-14 21:10:56 +00:00
Akira Hatanaka df5205ef3d Implement a DAGCombine in MipsISelLowering.cpp which transforms the following 
pattern:

(add v0, (add v1, abs_lo(tjt))) => (add (add v0, v1), abs_lo(tjt))

"tjt" is a TargetJumpTable node. 

llvm-svn: 158419
 2012-06-13 20:33:18 +00:00
Akira Hatanaka 1daf8c2a16 Set a higher value for maxStoresPerMemcpy in MipsISelLowering.cpp. 
llvm-svn: 158414
 2012-06-13 19:33:32 +00:00
Akira Hatanaka 9586618c58 Simplify CreateLoadLR and CreateStoreLR in MipsISelLowering.cpp. 
llvm-svn: 158413
 2012-06-13 19:06:08 +00:00
Akira Hatanaka f0273603f5 Implement fastcc calling convention for MIPS. 
llvm-svn: 158410
 2012-06-13 18:06:00 +00:00