Commit Graph

460 Commits

Author SHA1 Message Date
Ruchira Sasanka 5303bac986 Added isDef field to MachineOperand class - Ruchira
llvm-svn: 349
2001-08-07 20:14:30 +00:00
Vikram S. Adve ff7070bbb9 Allow machine instructions with variable numbers of arguments.
This is used only by Phi for now.

llvm-svn: 336
2001-07-31 21:49:28 +00:00
Vikram S. Adve 06c30a0419 Added class MachineCodeForBasicBlock.
llvm-svn: 332
2001-07-30 18:49:07 +00:00
Vikram S. Adve bff682dfac Eliminate separate enum for operand register type.
Use union for alternative data for different operand types.
Add iterator over Value* operands in a MachineInstr.

llvm-svn: 307
2001-07-28 04:06:37 +00:00
Chris Lattner 78a307b170 Eliminated the Unique class in favor of NonCopyable and NonCopyableV
llvm-svn: 280
2001-07-23 18:26:21 +00:00
Chris Lattner e2472bbf6c Moved inline/llvm/Tools/* to include/llvm/Support/*
llvm-svn: 279
2001-07-23 17:46:59 +00:00
Chris Lattner ae066aaf44 Nonpolymorphic class, doesn't need a virtual dtor!
llvm-svn: 276
2001-07-23 03:57:05 +00:00
Chris Lattner b299068101 Eliminate lots of unnecessary #includes and forward decls
there are probably more to kill

llvm-svn: 261
2001-07-21 23:24:48 +00:00
Chris Lattner dd511760d9 Renamed include/llvm/Codegen to include/llvm/CodeGen
llvm-svn: 253
2001-07-21 20:58:30 +00:00
Vikram S. Adve 5c66a797a2 Header files for the target architecture description and for instruction
selection, and instances of these for the SPARC.

llvm-svn: 226
2001-07-21 12:39:03 +00:00