Commit Graph

25 Commits

Author SHA1 Message Date
Muhammad Omair Javaid d6d3d21cd1 [LLDB] Add support for Arm64/Linux dynamic register sets
This is patch adds support for adding dynamic register sets for
AArch64 dynamic features in LLDB. AArch64 has optional features like
SVE, Pointer Authentication and MTE which means LLDB needs to decide
at run time which registers it needs to pull in for the current
executable based on underlying support for a certain feature.

This patch makes necessary adjustments to make way for dynamic
register infos and dynamic register sets.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D96458
2021-03-31 04:38:36 +05:00
Michał Górny 771c4c9cf6 [lldb] [Process/FreeBSD] Introduce aarch64 hw break/watchpoint support
Split out the common base of Linux hardware breakpoint/watchpoint
support for AArch64 into a Utility class, and use it to implement
the matching support on FreeBSD.

Differential Revision: https://reviews.llvm.org/D96548
2021-03-10 18:36:19 +01:00
Muhammad Omair Javaid 78cb4562fa Make offset field optional in RegisterInfo packet for Arm64
This patch carries forward our aim to remove offset field from qRegisterInfo
packets and XML register description. I have created a new function which
returns if offset fields are dynamic meaning client can calculate offset on
its own based on register number sequence and register size. For now this
function only returns true for NativeRegisterContextLinux_arm64 but we can
test this for other architectures and make it standard later.

As a consequence we do not send offset field from lldb-server (arm64 for now)
while other stubs dont have an offset field so it wont effect them for now.
On the client side we have replaced previous offset calculation algorithm
with a new scheme, where we sort all primary registers in increasing
order of remote regnum and then calculate offset incrementally.

This committ also includes a test to verify all of above functionality
on Arm64.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D91241
2020-12-02 03:19:43 +05:00
Muhammad Omair Javaid 26b8ea2e37 RegisterInfoPOSIX_arm64 remove unused bytes from g/G packet
This came up while putting together our new strategy to create g/G packets
in compliance with GDB RSP protocol where register offsets are calculated in
increasing order of register numbers without any unused spacing.

RegisterInfoPOSIX_arm64::GPR size was being calculated after alignment
correction to 8 bytes which meant there was a 4 bytes unused space between
last gpr (cpsr) and first vector register V. We have put LLVM_PACKED_START
decorator on RegisterInfoPOSIX_arm64::GPR to make sure single byte
alignment is enforced. Moreover we are now doing to use arm64 user_pt_regs
struct defined in ptrace.h for accessing ptrace user registers.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D92063
2020-12-02 03:19:39 +05:00
Muhammad Omair Javaid 4e8aeb97ca Send SVE vg register in custom expedited registerset
This patch ovverides GetExpeditedRegisterSet for
NativeRegisterContextLinux_arm64 to send vector granule register in
expedited register set if SVE mode is selected.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D82855
2020-11-30 17:34:19 +05:00
Muhammad Omair Javaid 567ba6c468 [LLDB] Add ptrace register access for AArch64 SVE registers
This patch adds NativeRegisterContext_arm64 ptrace routines to access
AArch64 SVE register set. This patch also adds a test-case to test
AArch64 SVE register access and dynamic size configuration capability.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D79699
2020-08-19 15:11:01 +05:00
Muhammad Omair Javaid 7fa7b81bcb Combine multiple defs of arm64 register sets
Summary:
This patch aims to combine similar arm64 register set definitions defined in NativeRegisterContextLinux_arm64 and RegisterContextPOSIX_arm64.
I have implemented a register set interface out of RegisterInfoInterface class and moved arm64 register sets into RegisterInfosPOSIX_arm64 which is similar to Utility/RegisterContextLinux_* implemented by various other targets. This will help in managing register sets of new ARM64 architecture features in one place.

Built and tested on x86_64-linux-gnu, aarch64-linux-gnu and arm-linux-gnueabihf targets.

Reviewers: labath

Reviewed By: labath

Subscribers: mhorne, emaste, kristof.beyls, atanasyan, danielkiss, lldb-commits

Differential Revision: https://reviews.llvm.org/D80105
2020-07-07 20:25:02 +05:00
Muhammad Omair Javaid b6f9d7b8fb Cleanup and speedup NativeRegisterContextLinux_arm64
Summary:
This patch simplifies register accesses in NativeRegisterContextLinux_arm64
and also adds some bare minimum caching to avoid multiple calls to ptrace
during a stop.

Linux ptrace returns data in the form of structures containing GPR/FPR data.
This means that one single call is enough to read all GPRs or FPRs. We do
that once per stop and keep reading from or writing to the buffer that we
have in NativeRegisterContextLinux_arm64 class. Before a resume or detach we
write all buffers back.

This is tested on aarch64 thunder x1 with Ubuntu 18.04. Also tested
regressions on x86_64.

Reviewers: labath, clayborg

Reviewed By: labath

Subscribers: kristof.beyls, lldb-commits

Differential Revision: https://reviews.llvm.org/D69371
2019-12-06 22:18:57 +05:00
Pavel Labath 3f3673ead9 NativeProcessLinux: Remove some register context boilerplate
Summary:
This patch follows the spirit of D63594, and removes some null checks
for things which should be operating invariants. Specifically
{Read,Write}[GF]PR now no longer check whether the supplied buffers are
null, because they never are. After this, the Do*** versions of these
function no longer serve any purpose and are inlined into their callers.

Other cleanups are possible here too, but I am taking this one step at a
time because this involves a lot of architecture-specific code, which I
don't have the hardware to test on (I did do a build-test though).

Reviewers: mgorny, jankratochvil, omjavaid, alexandreyy, uweigand

Subscribers: nemanjai, javed.absar, kbarton, lldb-commits

Differential Revision: https://reviews.llvm.org/D66744

llvm-svn: 370653
2019-09-02 12:50:18 +00:00
Jonas Devlieghere 8b3af63b89 [NFC] Remove ASCII lines from comments
A lot of comments in LLDB are surrounded by an ASCII line to delimit the
begging and end of the comment.

Its use is not really consistent across the code base, sometimes the
lines are longer, sometimes they are shorter and sometimes they are
omitted. Furthermore, it looks kind of weird with the 80 column limit,
where the comment actually extends past the line, but not by much.
Furthermore, when /// is used for Doxygen comments, it looks
particularly odd. And when // is used, it incorrectly gives the
impression that it's actually a Doxygen comment.

I assume these lines were added to improve distinguishing between
comments and code. However, given that todays editors and IDEs do a
great job at highlighting comments, I think it's worth to drop this for
the sake of consistency. The alternative is fixing all the
inconsistencies, which would create a lot more churn.

Differential revision: https://reviews.llvm.org/D60508

llvm-svn: 358135
2019-04-10 20:48:55 +00:00
Chandler Carruth 2946cd7010 Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636
2019-01-19 08:50:56 +00:00
Bruce Mitchener 4ebdee0a59 Typo fixes.
Reviewers: javed.absar

Subscribers: ki.stfu, JDevlieghere, lldb-commits

Differential Revision: https://reviews.llvm.org/D47421

llvm-svn: 333399
2018-05-29 09:10:46 +00:00
Pavel Labath d37349f380 Clean up NativeRegisterContext
Summary:
This commit removes the concrete_frame_idx member from
NativeRegisterContext and related functions, which was always set to
zero and never used.

I also change the native thread class to store a NativeRegisterContext
as a unique_ptr (documenting the ownership) and make sure it is always
initialized (most of the code was already blindly dereferencing the
register context pointer, assuming it would always be present -- this
makes its treatment consistent).

Reviewers: eugene, clayborg, krytarowski

Subscribers: aemerson, sdardis, nemanjai, javed.absar, arichardson, kristof.beyls, kbarton, uweigand, alexandreyy, lldb-commits

Differential Revision: https://reviews.llvm.org/D39837

llvm-svn: 317881
2017-11-10 11:05:49 +00:00
Zachary Turner 97206d5727 Rename Error -> Status.
This renames the LLDB error class to Status, as discussed
on the lldb-dev mailing list.

A change of this magnitude cannot easily be done without
find and replace, but that has potential to catch unwanted
occurrences of common strings such as "Error".  Every effort
was made to find all the obvious things such as the word "Error"
appearing in a string, etc, but it's possible there are still
some lingering occurences left around.  Hopefully nothing too
serious.

llvm-svn: 302872
2017-05-12 04:51:55 +00:00
Omair Javaid d5ffbad275 Hardware breakpoints for Linux on Arm/AArch64 targets
Please look at below differential link for upstream discussion.

Differential revision: https://reviews.llvm.org/D29669

llvm-svn: 296119
2017-02-24 13:27:31 +00:00
Kate Stone b9c1b51e45 *** This commit represents a complete reformatting of the LLDB source code
*** to conform to clang-format’s LLVM style.  This kind of mass change has
*** two obvious implications:

Firstly, merging this particular commit into a downstream fork may be a huge
effort.  Alternatively, it may be worth merging all changes up to this commit,
performing the same reformatting operation locally, and then discarding the
merge for this particular commit.  The commands used to accomplish this
reformatting were as follows (with current working directory as the root of
the repository):

    find . \( -iname "*.c" -or -iname "*.cpp" -or -iname "*.h" -or -iname "*.mm" \) -exec clang-format -i {} +
    find . -iname "*.py" -exec autopep8 --in-place --aggressive --aggressive {} + ;

The version of clang-format used was 3.9.0, and autopep8 was 1.2.4.

Secondly, “blame” style tools will generally point to this commit instead of
a meaningful prior commit.  There are alternatives available that will attempt
to look through this change and find the appropriate prior commit.  YMMV.

llvm-svn: 280751
2016-09-06 20:57:50 +00:00
Omair Javaid 43507f573d Allow installing watchpoints at less than 8-byte alligned addresses for AArch64 targets
This patch allows LLDB for AArch64 to watch all bytes, words or double words individually on non 8-byte alligned addresses.

This patch also adds tests to verify this functionality.

Differential revision: http://reviews.llvm.org/D21280

llvm-svn: 272916
2016-06-16 16:41:22 +00:00
Tamas Berghammer c40e7b1769 Fix the handling of FPR offsets in Linux arm/aarch64 register contexts
Differential revision: http://reviews.llvm.org/D12636

llvm-svn: 246959
2015-09-07 10:11:23 +00:00
Omair Javaid 1fd2a8cfa7 Fix AArch64 watchpoint handlers in NativeRegisterContextLinux_arm64
http://reviews.llvm.org/D11899

llvm-svn: 244750
2015-08-12 13:42:24 +00:00
Tamas Berghammer cec93c355a Fix 128bit register read and user register count on aarch64
llvm-svn: 241340
2015-07-03 11:17:07 +00:00
Pavel Labath c7512fdc1e [NativeProcessLinux] Use lambdas in DoOperation calls
Summary:
This removes a lot of boilerplate, which was needed to execute monitor operations. Previously one
needed do declare a separate class for each operation which would manually capture all needed
arguments, which was very verbose. In addition to less code, I believe this also makes the code
more readable, since now the implementation of the operation can be physically closer to the code
that invokes it.

Test Plan: Code compiles on x86, arm and mips, tests pass on x86 linux.

Reviewers: tberghammer, chaoren

Subscribers: aemerson, lldb-commits

Differential Revision: http://reviews.llvm.org/D10694

llvm-svn: 240772
2015-06-26 10:14:12 +00:00
Tamas Berghammer 068f8a7e2d Move register reading form NativeProcessLinux to NativeRegisterContextLinux*
This change reorganize the register read/write code inside lldb-server on Linux
with moving the architecture independent code into a new class called
NativeRegisterContextLinux and all of the architecture dependent code into the
appropriate NativeRegisterContextLinux_* class. As part of it the compilation of
the architecture specific register contexts are only compiled on the specific
architecture because they can't be used in other cases.

The purpose of this change is to remove a lot of duplicated code from the different
register contexts and to remove the architecture dependent codes from the global
NativeProcessLinux class.

Differential revision: http://reviews.llvm.org/D9935

llvm-svn: 238196
2015-05-26 11:58:52 +00:00
Omair Javaid ea8c25a802 This patch adds support for setting/clearing hardware watchpoints and breakpoints on AArch64 (Arm v8) 64-bit hardware.
http://reviews.llvm.org/D9706

llvm-svn: 237419
2015-05-15 06:29:58 +00:00
Tamas Berghammer db264a6d09 Move several plugin to its own namespace
Affected paths:
* Plugins/Platform/Android/*
* Plugins/Platform/Linux/*
* Plugins/Platform/gdb-server/*
* Plugins/Process/Linux/*
* Plugins/Process/gdb-remote/*

Differential revision: http://reviews.llvm.org/D8654

llvm-svn: 233679
2015-03-31 09:52:22 +00:00
Tamas Berghammer 1e209fcceb Create NativeRegisterContext for android-arm64
Differential revision: http://reviews.llvm.org/D8058

llvm-svn: 232160
2015-03-13 11:36:47 +00:00