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7 Commits

Author SHA1 Message Date
Stanislav Mekhanoshin a8d9d50762 [AMDGPU] gfx90a support 
Differential Revision: https://reviews.llvm.org/D96906
 2021-02-17 16:01:32 -08:00
Matt Arsenault d2e52eec51 AMDGPU: Select global saddr mode from SGPR pointer 
Use the 64-bit SGPR base with a 0 offset, since it's 1 fewer
instruction to materialize the 0 vs. the 64-bit copy.
 2020-11-16 11:51:06 -05:00
David Stuttard 943d8326dd AMDGPU: Fix lit test checks with dag option 
Summary:
I was seeing some failures on a test with slightly different instruction
ordering. Adding in some DAG directives solved the issue.

Change-Id: If5a3d3969055fb19279943bd45161bb70a3dabce

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70531
 2019-11-28 10:01:06 +00:00
Stanislav Mekhanoshin 899cdf95d9 [AMDGPU] Fixed mfma test check. NFC. 2019-11-20 12:33:12 -08:00
Stanislav Mekhanoshin 8fe1245a0f [AMDGPU] w/a for gfx908 mfma SrcC literal HW bug 
gfx908 ignores an mfma if SrcC is a literal.

Differential Revision: https://reviews.llvm.org/D66670

llvm-svn: 369816
 2019-08-23 22:09:58 +00:00
Stanislav Mekhanoshin 1dfae6fe50 [AMDGPU] use v32f32 for 3 mfma intrinsics 
These should really use v32f32, but were defined as v32i32
due to the lack of the v32f32 type.

Differential Revision: https://reviews.llvm.org/D64667

llvm-svn: 365972
 2019-07-12 22:42:01 +00:00
Stanislav Mekhanoshin e67cc380a8 [AMDGPU] gfx908 mfma support 
Differential Revision: https://reviews.llvm.org/D64584

llvm-svn: 365824
 2019-07-11 21:19:33 +00:00