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29 Commits

Author SHA1 Message Date
Dmitri Gribenko 8b2a3d1fea Remove unused stdio.h includes 
llvm-svn: 188626
 2013-08-18 08:29:51 +00:00
Tom Stellard ecf9d86404 R600: Use correct encoding for Vertex Fetch instructions on Cayman 
Reviewed-by: Vincent Lejeune<vljn at ovi.com>
llvm-svn: 184016
 2013-06-14 22:12:30 +00:00
Rafael Espindola 00345fa97b Fix 32 bit build in c++11 mode. 
The error was:
error: non-constant-expression cannot be narrowed from type 'long long' to 'long' in initializer list [-Wc++11-narrowing]
        MI.getOperand(6).getImm() & 0x1F,

llvm-svn: 182584
 2013-05-23 13:22:30 +00:00
Rafael Espindola 525cf28652 s/u_int32_t/uint32_t/ 
llvm-svn: 182444
 2013-05-22 01:36:19 +00:00
Rafael Espindola 5986ce0e5d Fix the build in c++11 mode. 
The errors were:

non-constant-expression cannot be narrowed from type 'int64_t' (aka 'long') to 'uint32_t' (aka 'unsigned int') in initializer list

and

non-constant-expression cannot be narrowed from type 'long' to 'uint32_t' (aka 'unsigned int') in initializer list

llvm-svn: 182168
 2013-05-17 22:45:52 +00:00
Vincent Lejeune d3eed66e8c R600: Improve texture handling 
llvm-svn: 182125
 2013-05-17 16:50:20 +00:00
Tom Stellard ecc2ad1cd4 R600: Fix encoding for R600 family GPUs 
Reviewed-by: Vincent Lejeune <vljn@ovi.com>

https://bugs.freedesktop.org/show_bug.cgi?id=64193
https://bugs.freedesktop.org/show_bug.cgi?id=64257
https://bugs.freedesktop.org/show_bug.cgi?id=64320

NOTE: This is a candidate for the 3.3 branch.
llvm-svn: 182113
 2013-05-17 15:23:21 +00:00
Tom Stellard edade94bbc R600: Pass MCSubtargetInfo reference to R600CodeEmitter 
llvm-svn: 182112
 2013-05-17 15:23:12 +00:00
Rafael Espindola b84cde5219 Remove unused fields and arguments. 
llvm-svn: 181706
 2013-05-13 14:34:48 +00:00
Tom Stellard d93cede8e4 R600: Remove dead code from the CodeEmitter v2 
v2:
  - Replace switch statement with TSFlags query

Reviewed-by: Vincent Lejeune <vljn@ovi.com>
Tested-By: Aaron Watry <awatry@gmail.com>
llvm-svn: 181229
 2013-05-06 17:50:57 +00:00
Tom Stellard cfe2ef8fea R600: Stop emitting the instruction type byte before each instruction 
Reviewed-by: Vincent Lejeune <vljn@ovi.com>
Tested-By: Aaron Watry <awatry@gmail.com>
llvm-svn: 181225
 2013-05-06 17:50:44 +00:00
Tom Stellard dbbcaf31b6 R600: Emit ISA for CALL_FS_* instructions 
Reviewed-by: Vincent Lejeune <vljn@ovi.com>
Tested-By: Aaron Watry <awatry@gmail.com>
llvm-svn: 181223
 2013-05-06 17:50:26 +00:00
Vincent Lejeune 3abdbf1cad R600: use native for alu 
llvm-svn: 180761
 2013-04-30 00:14:38 +00:00
Vincent Lejeune 22c4248213 R600: Add a Bank Swizzle operand 
llvm-svn: 180758
 2013-04-30 00:14:08 +00:00
Vincent Lejeune 3f1d136b02 R600: Turn TEX/VTX into native instructions 
llvm-svn: 180756
 2013-04-30 00:13:53 +00:00
Vincent Lejeune 117f075f6e R600: Use .AMDGPU.config section to emit stacksize 
llvm-svn: 180124
 2013-04-23 17:34:12 +00:00
Vincent Lejeune b6bfe85a07 R600: Add CF_END 
llvm-svn: 180123
 2013-04-23 17:34:00 +00:00
Vincent Lejeune 218093e834 R600: Export is emitted as a CF_NATIVE inst 
llvm-svn: 179685
 2013-04-17 15:17:32 +00:00
Vincent Lejeune 5f11dd390a R600: Control Flow support for pre EG gen 
llvm-svn: 179020
 2013-04-08 13:05:49 +00:00
Vincent Lejeune bcbb13d691 R600: Use a mask for offsets when encoding instructions 
llvm-svn: 178763
 2013-04-04 14:00:09 +00:00
Vincent Lejeune bfaa63a6db R600: Add support for native control flow 
llvm-svn: 178505
 2013-04-01 21:48:05 +00:00
Vincent Lejeune f43bc57b66 R600: Emit CF_ALU and use true kcache register. 
llvm-svn: 178503
 2013-04-01 21:47:42 +00:00
Vincent Lejeune 53f3525d35 R600: Emit native instructions for tex 
llvm-svn: 178452
 2013-03-31 19:33:04 +00:00
David Blaikie 772d4f75f6 Use LLVM_DELETED_FUNCTION rather than '// do not implement' comments. 
Also removes some redundant DNI comments on function declarations already
using the macro.

llvm-svn: 175466
 2013-02-18 23:11:17 +00:00
Vincent Lejeune 685018009b R600: Support for TBO 
NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
llvm-svn: 175445
 2013-02-18 14:11:19 +00:00
Tom Stellard 91da4e9199 R600: Add support for 128-bit parameters 
NOTE: This is a candidate for the Mesa stable branch.
llvm-svn: 175096
 2013-02-13 22:05:20 +00:00
Tom Stellard 365366f9ef R600: rework handling of the constants 
Remove Cxxx registers, add new special register - "ALU_CONST" and new
operand for each alu src - "sel". ALU_CONST is used to designate that the
new operand contains the value to override src.sel, src.kc_bank, src.chan
for constants in the driver.

Patch by: Vadim Girlin

Vincent Lejeune:
  - Use pointers for constants
  - Fold CONST_ADDRESS when possible

Tom Stellard:
  - Give CONSTANT_BUFFER_0 its own address space
  - Use integer types for constant loads

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 173222
 2013-01-23 02:09:06 +00:00
Chandler Carruth be81023d74 Resort the #include lines in include/... and lib/... with the 
utils/sort_includes.py script.

Most of these are updating the new R600 target and fixing up a few
regressions that have creeped in since the last time I sorted the
includes.

llvm-svn: 171362
 2013-01-02 10:22:59 +00:00
Tom Stellard 75aadc2813 Add R600 backend 
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX

llvm-svn: 169915
 2012-12-11 21:25:42 +00:00