OSchip
/
llvm-project
mirror of https://github.com/THU-DSP-LAB/llvm-project.git
13
0
Fork 6
Code Issues Packages Projects Releases Wiki Activity
378,166 Commits 31 Branches 0 Tags 2.2 GiB
Commit Graph

67 Commits

Author SHA1 Message Date
Jay Foad 9c7bd94ce8 Fix typo in comment 2020-04-09 10:36:00 +01:00
Kazushi (Jam) Marukawa 5526786a56 [VE] TLS codegen 
Summary:
Codegen and tests for thread-local storage.
This implements only the general dynamic model due to limitations in nld 2.26.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D74718
 2020-02-18 16:09:12 +01:00
Kazushi (Jam) Marukawa 60431bd728 [VE] Support for PIC (global data and calls) 
Summary: Support for PIC with tests for global variables and function calls.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D74536
 2020-02-14 09:50:02 +01:00
Kazushi (Jam) Marukawa 42a16dacda [VE] Bit operator isel 
Summary: Isel and tests for bswap,brev,ctpop,ctlz,ctty,rotl,rotr

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D74304
 2020-02-12 09:02:13 +01:00
Kazushi (Jam) Marukawa 3ed12232b0 [VE] half fptrunc+store&load+fpext 
Summary:
fp16 (half) load+fpext and fptrunc+store isel legalization and tests.
Also, ExternalSymbolSDNode operand printing (tested by fp16 lowering).

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D73899
 2020-02-04 17:16:09 +01:00
Kazushi (Jam) Marukawa be9fe6aa8b [VE] (fp)trunc+store & load+(fp)ext isel 
Summary: load+sext/zext/fpext and (fp)trunc+store isel legalization and tests

Reviewers: arsenm, craig.topper, rengolin, k-ishizaka

Reviewed By: arsenm

Subscribers: merge_guards_bot, wdng, hiraditya, llvm-commits

Tags: #ve, #llvm

Differential Revision: https://reviews.llvm.org/D73774
 2020-02-03 16:55:44 +01:00
Kazushi (Jam) Marukawa 07c9f7574d [VE] vaarg functions callers and callees 
Summary: Isel patterns and tests for vaarg functions as callers and callees.

Reviewers: arsenm, rengolin, k-ishizaka

Subscribers: merge_guards_bot, wdng, hiraditya, llvm-commits

Tags: #ve, #llvm

Differential Revision: https://reviews.llvm.org/D73710
 2020-02-03 16:26:44 +01:00
Kazushi (Jam) Marukawa fef80a2946 [VE] (conditional) branch modification & isel patterns 
Summary:
InstInfo for branch modification, (conditional) branch isel patterns and tests.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D73632
 2020-01-29 17:40:57 +01:00
Kazushi (Jam) Marukawa 0bec0e7151 [VE] udiv/sdiv/urem/srem/mul isel patterns 
Summary:
udiv/sdiv/urem/srem/mul integer isel patterns and tests.
Pretend for now that integer division were always cheap in HW.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D73623
 2020-01-29 15:59:50 +01:00
Kazushi (Jam) Marukawa 6b587ee23c [VE] Isel patterns for fp32/64 and i32/64 conversion 
Summary:
fp32/64 <> signed/unsigned i32/64 conversion isel patterns and tests

(This patch depends on `fsub` implemented by https://reviews.llvm.org/D73540 )

Reviewers: arsenm, craig.topper, rengolin, k-ishizaka

Reviewed By: arsenm

Subscribers: merge_guards_bot, wdng, hiraditya, llvm-commits

Tags: #ve, #llvm

Differential Revision: https://reviews.llvm.org/D73544
 2020-01-29 14:10:22 +01:00
Kazushi (Jam) Marukawa 92600c2ec8 [VE] call isel with stack passing 
Summary:
Function calls and stack-passing of function arguments.
Custom lowering, isel patterns and tests.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D73461
 2020-01-28 10:55:47 +01:00
Kazushi (Jam) Marukawa 422dfea577 [VE] enable unaligned load/store isel 
Summary: Enable unaligned load/store isel for iN and fp32/64 and tests.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D73448
 2020-01-28 09:53:37 +01:00
Kazushi (Jam) Marukawa 0fca35c652 [VE] global variable isel patterns 
Summary: Asm expr fixups, isel patterns and tests for global variables addresses.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D73355
 2020-01-24 17:35:14 +01:00
Kazushi (Jam) Marukawa dc69265eea [VE] setcc isel patterns 
Summary: SETCC isel patterns and tests for i32/64 and fp32/64 comparison

Reviewers: arsenm, rengolin, craig.topper, k-ishizaka

Reviewed By: arsenm

Subscribers: merge_guards_bot, wdng, hiraditya, llvm-commits

Tags: #ve, #llvm

Differential Revision: https://reviews.llvm.org/D73171
 2020-01-22 15:45:57 +01:00
Kazushi (Jam) Marukawa 3a906a9f4e [VE] i<N> and fp32/64 arguments, return values and constants 
Summary:
Support for i<N> and fp32/64 arguments (in register), return values
and constants along with tests.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D73092
 2020-01-22 09:17:44 +01:00
Kazushi (Jam) Marukawa 773ae62ff8 [VE] i64 arguments, return values and constants 
Summary: Support for i64 arguments (in register), return values and constants along with tests.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D72776
 2020-01-16 10:09:50 +01:00
Kazushi (Jam) Marukawa 064859bde7 [VE] Minimal codegen for empty functions 
Summary:
This patch implements minimal VE code generation for empty function bodies (no args, no value return).

Contents

* empty function code generation test.
* Minimal function prologue & epilogue emission
* Instruction formats and instruction definitions as far as required for the empty function prologue & epilogue.
* I64 register class definitions.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D72598
 2020-01-15 09:55:16 +01:00