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1 Commits

Author SHA1 Message Date
Jinsong Ji c8ec685ca5 [llvm-exegesis][PowerPC] Add more register classes
This PR adds more register class support in PowerPC,
mark OperandType for imm and memory operands.

Also added more unit tests for SnippetGenerator.

Reviewed By: #powerpc, steven.zhang

Differential Revision: https://reviews.llvm.org/D88044
2020-12-04 15:02:12 +00:00