b9dce9db85
More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale.
...
llvm-svn: 35074
2007-03-12 23:29:01 +00:00
ddf082082c
Putting more constants which do not contain relocations into .literal{4|8|16}
...
llvm-svn: 35026
2007-03-08 08:31:54 +00:00
d918477ac3
For Darwin, put constant data into .const, .const_data, .literal{4|8|16}
...
sections.
llvm-svn: 35017
2007-03-08 01:25:25 +00:00
8b8cac289b
Minor interface change.
...
llvm-svn: 34967
2007-03-06 10:05:14 +00:00
4f2e4e0f92
Switch PPC return lower to use an autogenerated CC description.
...
llvm-svn: 34940
2007-03-06 00:59:59 +00:00
e6049c2f08
Emit low/high immediate loads properly for Linux/PPC.
...
llvm-svn: 34871
2007-03-03 05:29:51 +00:00
75ab9799df
Implemented the frameaddress intrinsic for PPC.
...
llvm-svn: 34787
2007-03-01 13:11:38 +00:00
e0232ec706
More Mach-O writer improvements.
...
llvm-svn: 34740
2007-02-28 07:40:50 +00:00
95ae95a6a6
PEI now passes a RegScavenger ptr to eliminateFrameIndex.
...
llvm-svn: 34707
2007-02-28 00:21:17 +00:00
b524dfd557
Fix parenthesis for BCTRL_{ELF|Macho} test.
...
llvm-svn: 34668
2007-02-27 13:10:41 +00:00
89d81878d2
Differentiate between the MachO and the ELF ABI the CALL instruction.
...
llvm-svn: 34667
2007-02-27 13:01:19 +00:00
b6e200bd68
Duplicate use of LR, take 2.
...
llvm-svn: 34666
2007-02-27 11:55:45 +00:00
5d7ce57c13
Backing out Jim's LR spill changes. This was causing llvm-gcc bootstrapping
...
to infinite loop:
PPCMachineFunctionInfo.h updated: 1.2 -> 1.3
PPCRegisterInfo.cpp updated: 1.110 -> 1.111
PPCRegisterInfo.h updated: 1.28 -> 1.29
llvm-svn: 34652
2007-02-27 02:55:29 +00:00
535bd6d3ba
always lower to RETFLAG, never leave it as just ret.
...
llvm-svn: 34639
2007-02-26 19:44:02 +00:00
1ee61ab414
no really, this is the right patch
...
llvm-svn: 34605
2007-02-25 20:01:40 +00:00
4d2f5f8740
always promote float varargs to double.
...
llvm-svn: 34604
2007-02-25 19:59:18 +00:00
84ab9a556c
one important bugfix: PPC32 didn't have both elf and macho support for
...
external symbols and global addresses. Add the missing ones.
one important workaround: PPCISD::CALL is matched by both PPCcall_ELF
and PPCcall_Macho, disable the _ELF patterns for now.
llvm-svn: 34601
2007-02-25 19:20:53 +00:00
43df5b335c
implement support for the linux/ppc function call ABI. Patch by
...
Nicolas Geoffray!
llvm-svn: 34574
2007-02-25 05:34:32 +00:00
b9bd34f54a
Add XLForm_1_ext template, patch by Nicolas Geoffray.
...
llvm-svn: 34573
2007-02-25 05:07:49 +00:00
249edb8b67
Improve JIT support for linux/ppc: Patch by Nicolas Geoffray!
...
llvm-svn: 34572
2007-02-25 05:04:13 +00:00
2f28a3cf08
Don't spill LR as a callee saved register.
...
llvm-svn: 34533
2007-02-23 20:34:16 +00:00
df5899258c
By default, spills kills the register being stored.
...
llvm-svn: 34515
2007-02-23 01:10:04 +00:00
0416b204c9
remove obsolete file
...
llvm-svn: 34506
2007-02-22 23:48:43 +00:00
e0008e23cf
Simplify lowering and selection of exception ops.
...
llvm-svn: 34488
2007-02-22 14:56:36 +00:00
3796abea0f
Support to provide exception and selector registers.
...
llvm-svn: 34482
2007-02-21 22:54:50 +00:00
18fc09723c
Add support for changes in DwarfWriter.
...
llvm-svn: 34478
2007-02-21 22:47:38 +00:00
af76e0e58f
Add TAI field for exception table section.
...
llvm-svn: 34477
2007-02-21 22:43:40 +00:00
f7ed82da10
Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.
...
llvm-svn: 34428
2007-02-19 21:49:54 +00:00
da81bf4d3e
For PR1207:
...
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.
llvm-svn: 34399
2007-02-19 03:20:00 +00:00
9865be6d40
Added getReservedRegs().
...
llvm-svn: 34376
2007-02-17 11:06:00 +00:00
1f7d60262e
Fix ixaddrs as well, allowing ppc64 to compile to:
...
_test2:
li r2, 0
lis r3, 1
std r2, 9024(r3)
blr
instead of:
_test2:
lis r2, 1
li r3, 0
ori r2, r2, 9024
std r3, 0(r2)
blr
This implements CodeGen/PowerPC/LargeAbsoluteAddr.ll:test2
llvm-svn: 34373
2007-02-17 06:57:26 +00:00
4a9c0bb147
Compile test/CodeGen/PowerPC/LargeAbsoluteAddr.ll to:
...
_test:
lis r2, 743
li r3, 0
stw r3, 32751(r2)
blr
instead of:
_test:
li r2, 0
stw r2, 32751(48693248)
blr
Implement support for ppc64 as well, allowing it to produce better code.
llvm-svn: 34371
2007-02-17 06:44:03 +00:00
8091f28d1a
fix incorrect encoding of vminsw.
...
llvm-svn: 34351
2007-02-16 21:20:09 +00:00
945e437c65
Generalize TargetData strings, to support more interesting forms of data.
...
Patch by Scott Michel.
llvm-svn: 34266
2007-02-14 05:52:17 +00:00
c9088b4c8e
add a note
...
llvm-svn: 34101
2007-02-09 17:38:01 +00:00
ba52b94fa2
Remove fixed item
...
llvm-svn: 34081
2007-02-09 04:19:54 +00:00
e796b6de45
Fixed comments.
...
llvm-svn: 34040
2007-02-08 06:05:08 +00:00
2aa9a42f24
Moved the MachOWriter and ELFWriter out of the Target/* files. Placed the
...
definition of it into the CodeGen library. This is so that a backend doesn't
necessarily add in these writers if it doesn't use them (like in the lli
program).
llvm-svn: 34034
2007-02-08 01:39:44 +00:00
4e8ad36338
Dead files. Functionality has been taken over by the Add*Writer functions.
...
llvm-svn: 34029
2007-02-08 01:32:51 +00:00
a883f55eca
Moved the GetTargetRelocation method from PPCMachOWriter to here. It uses
...
non-Mach-O-specific information.
llvm-svn: 33819
2007-02-03 02:41:58 +00:00
2c350921e2
Moved the GetTargetRelocation method to the PPCMachOWriterInfo object. The
...
PPCMachOWriter is now trivial.
llvm-svn: 33818
2007-02-03 02:40:57 +00:00
c3de9b4b14
Support for non-landing pad exception handling.
...
llvm-svn: 33755
2007-02-01 16:31:34 +00:00
f7937005a3
Fix CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
...
llvm-svn: 33732
2007-02-01 00:39:08 +00:00
37ebf9317b
A relatively simple PPC optimization.
...
llvm-svn: 33709
2007-01-31 19:49:20 +00:00
5301e7c605
For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoid
...
confusion with external linkage types.
llvm-svn: 33663
2007-01-30 20:08:39 +00:00
0e083d0161
Darwin -static should codegen static ctors / dtors to .constructor / .destructor sections.
...
llvm-svn: 33657
2007-01-30 08:04:53 +00:00
3f9f250928
Only gather frame info if debug or eh.
...
llvm-svn: 33639
2007-01-29 23:20:22 +00:00
eda5997cc8
Finish off bug 680, allowing targets to custom lower frame and return
...
address nodes.
llvm-svn: 33636
2007-01-29 22:58:52 +00:00
e3b09fbbb0
We'd still like to register allocate r2 on darwin before the callee-save
...
regs.
llvm-svn: 33635
2007-01-29 22:57:48 +00:00
17f250005a
Update some of the llvm in the readme
...
llvm-svn: 33630
2007-01-29 21:21:22 +00:00
b4a2f05d1c
Landing pad-less eh for PPC.
...
llvm-svn: 33622
2007-01-29 18:51:14 +00:00
037c867b54
Propagate changes from my local tree. This patch includes:
...
1. New parameter attribute called 'inreg'. It has meaning "place this
parameter in registers, if possible". This is some generalization of
gcc's regparm(n) attribute. It's currently used only in X86-32 backend.
2. Completely rewritten CC handling/lowering code inside X86 backend.
Merged stdcall + c CCs and fastcall + fast CC.
3. Dropped CSRET CC. We cannot add struct return variant for each
target-specific CC (e.g. stdcall + csretcc and so on).
4. Instead of CSRET CC introduced 'sret' parameter attribute. Setting in
on first attribute has meaning 'This is hidden pointer to structure
return. Handle it gently'.
5. Fixed small bug in llvm-extract + add new feature to
FunctionExtraction pass, which relinks all internal-linkaged callees
from deleted function to external linkage. This will allow further
linking everything together.
NOTEs: 1. Documentation will be updated soon.
2. llvm-upgrade should be improved to translate csret => sret.
Before this, there will be some unexpected test fails.
llvm-svn: 33597
2007-01-28 13:31:35 +00:00
debcb5530c
Fix a spelling error
...
llvm-svn: 33556
2007-01-26 22:40:50 +00:00
f209495e93
Handle multiple functions, properly mangle symbols, and fix support for
...
scattered relocations.
llvm-svn: 33555
2007-01-26 22:39:48 +00:00
c56315c2b5
Change the MachineDebugInfo to MachineModuleInfo to better reflect usage
...
for debugging and exception handling.
llvm-svn: 33550
2007-01-26 21:22:28 +00:00
f9e5445ed4
Make LABEL a builtin opcode.
...
llvm-svn: 33537
2007-01-26 14:34:52 +00:00
313c2937f0
Fix comment.
...
llvm-svn: 33508
2007-01-25 22:48:25 +00:00
5acf2fbb43
- Tell PEI that PPC will handle stack frame rounding itself.
...
- Do not round up to max. alignment of stack object if it is > stack alignment.
It will have to be handled with dynamic aligning code.
llvm-svn: 33505
2007-01-25 22:25:04 +00:00
48518548bd
Fix test/CFrontend/2007-01-24-InlineAsmCModifier.c on PPC
...
llvm-svn: 33494
2007-01-25 02:52:50 +00:00
f6c63fec92
Repair debug frames as a prelude to eh_frames. Switched to using MachineMoves
...
by value so that clean up is less confusing (these vectors tend to be small.)
llvm-svn: 33488
2007-01-24 18:45:13 +00:00
06a03210af
Make ivars private and use getters. Have the MachOWriter return "Mach-O
...
Writer" for the pass name.
llvm-svn: 33483
2007-01-24 07:13:56 +00:00
40cb811cf8
Add a field for and construction of the PPCMachOWriterInfo object.
...
llvm-svn: 33480
2007-01-24 03:41:36 +00:00
56f1058309
Move the getJTRelocation method out of here.
...
llvm-svn: 33479
2007-01-24 03:40:33 +00:00
a1b7b8a485
New "TargetMachOWriterInfo" class. It holds target-specific information
...
that the MachOWriter needs in order to do its writing stuff 'n things.
llvm-svn: 33475
2007-01-24 03:36:05 +00:00
16e58be1bc
hasFP() is now a virtual method of MRegisterInfo.
...
llvm-svn: 33455
2007-01-23 00:57:47 +00:00
9f3a7eb9b2
Double and long preferred alignment set to 8 bytes.
...
llvm-svn: 33447
2007-01-22 23:11:06 +00:00
28c5b8618a
Needed to build on PPC Linux.
...
llvm-svn: 33352
2007-01-19 04:36:02 +00:00
889d934d00
move contents of PR587 to here.
...
llvm-svn: 33333
2007-01-18 07:34:57 +00:00
e750f61ac5
Have the OutputBuffer take the is64Bit and isLittleEndian booleans.
...
llvm-svn: 33316
2007-01-18 01:23:11 +00:00
c1ea85b4c4
Modify emission of jump tables on darwin to emit an extra "l" label that
...
delimits the boundaries of jump tables. This lets the linker's dead code
stripping optimization do a better job.
llvm-svn: 33315
2007-01-18 01:15:58 +00:00
cd9c1f035a
Changed to use the OutputBuffer instead of the methods in MachO and ELF
...
writers.
llvm-svn: 33311
2007-01-17 22:22:31 +00:00
38ee6519b7
Revert patch.
...
llvm-svn: 33298
2007-01-17 09:06:13 +00:00
05e5a5ee6c
Create the specified TargetObjInfo and use it.
...
llvm-svn: 33291
2007-01-17 03:51:37 +00:00
f758157385
New "TargetObjInfo" class. This holds information that the object writers will
...
use to write things to the file. It's abstract so each target should implement
its own version for each writer type.
llvm-svn: 33286
2007-01-17 03:46:30 +00:00
c7b2ab9bdf
Instead of yet another enum indicating the "assembly language flavor",
...
just use the one that's in the subtarget.
llvm-svn: 33255
2007-01-16 09:29:17 +00:00
e21237e59a
Fix for PR1095:
...
LLVM would miscompile ASM dialects when compiling for PPC. Added dialects for
the X86 and PPC backends. It defaults to "0", the first variant of a compound
inline asm expression.
llvm-svn: 33246
2007-01-16 03:42:04 +00:00
3c84b551db
add support for hidden visibility to darwin/ppc and linux/ppc targets
...
llvm-svn: 33200
2007-01-14 06:37:54 +00:00
72a56fc44c
Disable the macho writer until it is 100% functional. Enabling it when
...
broken invites bug reports.
llvm-svn: 32961
2007-01-06 22:27:58 +00:00
8bc7ddb84d
setSetCCIsExpensive is gone.
...
llvm-svn: 32941
2007-01-05 23:42:53 +00:00
74b46e8c05
Fix naming inconsistency.
...
llvm-svn: 32823
2007-01-02 21:33:40 +00:00
28663c73ef
Changes from Nick Lewycky with a simplified PPCTargetAsmInfo.
...
llvm-svn: 32735
2006-12-21 20:26:09 +00:00
4c90a6df16
Oops.
...
llvm-svn: 32724
2006-12-20 21:35:00 +00:00
c2c861d00e
Original patch was overly complicated.
...
llvm-svn: 32723
2006-12-20 21:33:34 +00:00
41621a72f5
Changes to target powerpc for non-Darwin assemblers.
...
1. Patches from Nick Lewycky.
2. Code to filter register names and print them as numeric values on
non-Darwin systems.
llvm-svn: 32721
2006-12-20 20:56:46 +00:00
1ef9cd400d
eliminate static ctors for Statistic objects.
...
llvm-svn: 32703
2006-12-19 22:59:26 +00:00
d7998d0e6d
move ExtWeakSymbols to AsmPrinter
...
llvm-svn: 32648
2006-12-18 03:37:18 +00:00
360a14be02
Apply B. Scott Michel's patch for PR1054, thanks!
...
llvm-svn: 32630
2006-12-16 20:23:42 +00:00
a0850e98ee
Patterns no longer needed due to fix in the DAG combiner.
...
llvm-svn: 32612
2006-12-15 21:39:31 +00:00
73d307d12d
Not all test cases are created equal. This fix is needed.
...
llvm-svn: 32605
2006-12-15 18:51:01 +00:00
38b1d53afe
Not needed. Misinterpreted error message from other bug (Missing load/store
...
relocations.)
llvm-svn: 32604
2006-12-15 18:45:32 +00:00
b0367c987e
Missing load/store relocations.
...
llvm-svn: 32601
2006-12-15 16:44:10 +00:00
36d826dca2
Provide 64-bit support for i64 sextload<i8>.
...
llvm-svn: 32600
2006-12-15 14:34:11 +00:00
f07cc990dd
Provide support for FP_TO_UINT.
...
llvm-svn: 32599
2006-12-15 14:32:57 +00:00
59e7a777da
Honor cpu directive, take two.
...
llvm-svn: 32492
2006-12-12 20:57:08 +00:00
8171e58bd9
Rollback changes to take a different tack.
...
llvm-svn: 32488
2006-12-12 19:26:50 +00:00
7c3cab9ddc
Honor the command line specification for machine type.
...
llvm-svn: 32483
2006-12-12 16:07:33 +00:00
095e6f3044
Reduce number of instructions to load 64-bit constants.
...
llvm-svn: 32481
2006-12-12 13:23:43 +00:00
f4646a7e54
Another step forward in PPC64 JIT support: we now no-longer need stubs
...
emitted for external globals in PPC64-JIT-PIC mode (which is good because
we didn't handle them before!).
This also fixes a bug handling the picbase delta, which we would get wrong
in some cases.
llvm-svn: 32451
2006-12-11 23:22:45 +00:00
b1f3157638
getInstrItineraryData shouldn't copy the itineraries
...
llvm-svn: 32448
2006-12-11 21:42:55 +00:00
2b136a73bd
Missing opcode.
...
llvm-svn: 32439
2006-12-11 18:45:56 +00:00
e95909a4ef
Layout proper frame for ppc64.
...
llvm-svn: 32436
2006-12-11 18:10:54 +00:00
e8da58b3f9
Properly mangles symbol table names
...
Supports constant pools
Supports relocations to jump tables
Supports relocations within the data segment (global = address of global)
Allocates memory in a non-hacky for all non-code objects.
llvm-svn: 32430
2006-12-11 02:20:45 +00:00
3b7c257cae
Cleaned setjmp/longjmp lowering interfaces. Now we're producing right
...
code (both asm & cbe) for Mingw32 target.
Removed autoconf checks for underscored versions of setjmp/longjmp.
llvm-svn: 32415
2006-12-10 23:12:42 +00:00
6af2220815
Reverting until finding the cause of secondary bugs.
...
llvm-svn: 32413
2006-12-10 13:09:42 +00:00
04c832d4ab
__PPC64CompilationCallback code was allowing registers to be clobbered by stub.
...
llvm-svn: 32412
2006-12-10 12:13:31 +00:00
09fecf9a47
this is an initial patch to switch the ppc64 jit over to working in PIC mode,
...
which allows the code to be above the 2G marker. We still need to JIT emit
dyld stubs to support external, weak, common, etc globals, but that will
happen tomorrow.
llvm-svn: 32348
2006-12-08 04:54:03 +00:00
13535c2d93
fix incorrect encoding of rldicr, used by ppc64 function stubs, etc.
...
llvm-svn: 32341
2006-12-07 23:44:07 +00:00
9bfb1e1f29
What should be the last unnecessary <iostream>s in the library.
...
llvm-svn: 32333
2006-12-07 22:21:48 +00:00
a9a817dc7d
fix CodeGen/PowerPC/2006-12-07-LargeAlloca.ll on ppc64
...
llvm-svn: 32331
2006-12-07 22:15:58 +00:00
d8e7451dc3
Fix i64 uint_to_fp on ppc64
...
llvm-svn: 32297
2006-12-07 01:24:16 +00:00
43c0eb839c
implement sextinreg i8->i64 and i16->i64
...
llvm-svn: 32293
2006-12-06 21:46:13 +00:00
9472eb83c3
fix another sradi encoding bug. This fixes Olden/health with the ppc64 jit.
...
llvm-svn: 32291
2006-12-06 21:35:10 +00:00
aeadac88ea
fix the jit encoding of sradi, simplify the MDForm1 description.
...
llvm-svn: 32285
2006-12-06 20:02:54 +00:00
1fa392dbfa
add relocation support for ppc64 branches.
...
llvm-svn: 32284
2006-12-06 19:40:04 +00:00
700b873130
Detemplatize the Statistic class. The only type it is instantiated with
...
is 'unsigned'.
llvm-svn: 32279
2006-12-06 17:46:33 +00:00
527c12f8e6
Make it easier for gdb to find the return address.
...
llvm-svn: 32277
2006-12-06 17:42:06 +00:00
e4f4d048dd
Restoration of the stack pointer after a deallocation of a alloca was not
...
updating the SP link.
llvm-svn: 32202
2006-12-04 22:04:42 +00:00
022030a425
Add weak reference directive.
...
llvm-svn: 32091
2006-12-01 20:47:11 +00:00
b689d32b20
Copy and paste error. An initialized global cannot be a weak reference.
...
llvm-svn: 32075
2006-12-01 17:39:22 +00:00
1b0bc794e6
1. In ppc64 mode we need only use one GPR.
...
2. Float values need to be promoted to double when they are vararg.
llvm-svn: 32074
2006-12-01 16:30:47 +00:00
311622f912
ExternalWeak case in wrong location.
...
llvm-svn: 32073
2006-12-01 14:37:39 +00:00
5fb2c76d59
A initialized global variable cannot be extern weak. However, if a global value's initializer is itself a external weak symbol, emit the weak reference.
...
llvm-svn: 32069
2006-12-01 09:13:26 +00:00
fa54c0b6fb
Darwin PPC external weak linkage support.
...
llvm-svn: 32068
2006-12-01 07:56:37 +00:00
09ed0ff2ac
Fix the CodeGen/PowerPC/vec_constants.ll regression.
...
llvm-svn: 32057
2006-12-01 01:45:39 +00:00
aafeaef8c8
MachineInstr::setOpcode -> MachineInstr::setInstrDescriptor
...
llvm-svn: 32034
2006-11-30 07:12:03 +00:00
2f648fc55d
Fix bug codegen'ing FP constant vectors with integer splats. Make sure the
...
created intrinsics have the right integer types. This fixes
PowerPC/2006-11-29-AltivecFPSplat.ll
llvm-svn: 32024
2006-11-29 19:58:49 +00:00
152671f0bf
Offset for load of 32-bit arg in 64-bit world was incorrect.
...
llvm-svn: 32019
2006-11-29 13:37:09 +00:00
40182179b6
Remove debug code.
...
llvm-svn: 31970
2006-11-28 18:27:02 +00:00
ec05b046c7
Prime text sections to improve branch locality in large object files.
...
llvm-svn: 31969
2006-11-28 18:21:52 +00:00
f4e2e009d9
32-bit int space was not accounted for properly in lowerCall.
...
llvm-svn: 31966
2006-11-28 14:53:52 +00:00
20350c4025
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
...
of opcode and number of operands.
llvm-svn: 31947
2006-11-27 23:37:22 +00:00
6968c497de
Add newline at end of file.
...
llvm-svn: 31902
2006-11-25 05:41:02 +00:00
ec5dbccdcf
in ppc64-mode, don't allocate the 32-bit version of r13 either.
...
llvm-svn: 31884
2006-11-20 20:48:05 +00:00
ac36360348
r13 is the thread pointer on darwin/ppc64, don't allocate it.
...
llvm-svn: 31882
2006-11-20 19:33:51 +00:00
2cca385fbb
on ppc64, float arguments take 8-byte stack slots not 4-byte stack slots.
...
Also, valist should create a pointer RC reg class value, not a GPRC value.
llvm-svn: 31840
2006-11-18 01:57:19 +00:00
572e238c14
make sure to safe LR8 in the right stack slot for PPC64
...
llvm-svn: 31839
2006-11-18 01:34:43 +00:00
9ca15c8914
Pretty print 'rldicr r2, r2, 2, 61' as 'sldi r2, r2, 2'.
...
llvm-svn: 31838
2006-11-18 01:23:56 +00:00
542dfd5510
Rewrite the branch selector to be correct in the face of large functions.
...
The algorithm it used before wasn't 100% correct, we now use an iterative
expansion model. This fixes assembler errors when compiling 403.gcc with
tail merging enabled.
Change the way the branch selector works overall: Now, the isel generates
PPC::BCC instructions (as it used to) directly, and these BCC instructions
are emitted to the output or jitted directly if branches don't need
expansion. Only if branches need expansion are instructions rewritten
and created. This should make branch select faster, and eliminates the
Bxx instructions from the .td file.
llvm-svn: 31837
2006-11-18 00:32:03 +00:00
33fc1d45e5
add encoding for BCC, after finally wrestling strange ppc/tblgen endianness
...
issues to the ground.
llvm-svn: 31836
2006-11-17 23:53:28 +00:00
be9377a1e3
convert PPC::BCC to use the 'pred' operand instead of separate predicate
...
value and CR reg #. This requires swapping the order of these everywhere
that touches BCC and requires us to write custom matching logic for
PPCcondbranch :(
llvm-svn: 31835
2006-11-17 22:37:34 +00:00
e0263794f4
rename PPC::COND_BRANCH to PPC::BCC
...
llvm-svn: 31834
2006-11-17 22:14:47 +00:00
8c6a41ea12
start using PPC predicates more consistently.
...
llvm-svn: 31833
2006-11-17 22:10:59 +00:00
73106b5e2a
Assert unhandled case.
...
llvm-svn: 31828
2006-11-17 18:49:39 +00:00
1823346b3e
1. Ignore the -disable-fp-elim when the routine is a leaf.
...
2. Offsets on 64-bit stores are still in bytes.
llvm-svn: 31824
2006-11-17 16:09:31 +00:00
91542a4f2d
Typo. Fix the nightly tests.
...
llvm-svn: 31823
2006-11-17 14:06:41 +00:00
3b7261b18e
implement a todo: change a map into a vector
...
llvm-svn: 31805
2006-11-17 01:52:23 +00:00
be1a4d80b3
fix typo
...
llvm-svn: 31799
2006-11-17 00:49:36 +00:00
a715288b40
implicit_def_vrrc doesn't generate code.
...
llvm-svn: 31797
2006-11-16 23:49:52 +00:00
48850c10c0
This is a general clean up of the PowerPC ABI. Address several problems and
...
bugs including making sure that the TOS links back to the previous frame,
that the maximum call frame size is not included twice when using frame
pointers, no longer growing the frame on calls, double storing of SP and
a cleaner/faster dynamic alloca.
llvm-svn: 31792
2006-11-16 22:43:37 +00:00
30055b9208
fix a regression that I introduced. stdu should scale the offset by 4
...
before printing it.
llvm-svn: 31791
2006-11-16 21:45:30 +00:00
96d7386006
add a statistic
...
llvm-svn: 31785
2006-11-16 18:13:49 +00:00
a7ff5162b0
fix broken encoding
...
llvm-svn: 31778
2006-11-16 01:01:28 +00:00
e742d9a4b7
add ppc64 r+i stores with update.
...
llvm-svn: 31776
2006-11-16 00:57:19 +00:00
6f5840c409
add patterns for ppc32 preinc stores. ppc64 next.
...
llvm-svn: 31775
2006-11-16 00:41:37 +00:00
3a494989a6
switch these back to the 'bad old way'
...
llvm-svn: 31774
2006-11-16 00:33:34 +00:00
b4e911d15a
Fix ppc64 epilog bug.
...
llvm-svn: 31771
2006-11-15 23:35:30 +00:00
5771156be0
Stop using isTwoAddress, switching to operand constraints instead.
...
Tell the codegen emitter that specific operands are not to be encoded, fixing
JIT regressions w.r.t. pre-inc loads and stores (e.g. lwzu, which we generate
even when general preinc loads are not enabled).
llvm-svn: 31770
2006-11-15 23:24:18 +00:00
dc2c8748a7
Properly transfer kill / dead info.
...
llvm-svn: 31765
2006-11-15 20:58:11 +00:00
474b5b7c95
fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use memri
...
addrmodes.
llvm-svn: 31757
2006-11-15 19:55:13 +00:00
0e117c7e9d
Fix the PPC regressions last night
...
llvm-svn: 31752
2006-11-15 17:40:51 +00:00
1396961e85
Switch loads over to use memri as the operand instead of a reg/imm operand
...
pair for cleanliness. Add instructions for PPC32 preinc-stores with commented
out patterns. More improvement is needed to enable the patterns, but we're
getting close.
llvm-svn: 31749
2006-11-15 02:43:19 +00:00
e79a451475
group load and store instructions together. No functionality change.
...
llvm-svn: 31736
2006-11-14 19:19:53 +00:00
44dbdbe5cf
Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 calls
...
clobber. This allows LR8 to be save/restored correctly as a 64-bit quantity,
instead of handling it as a 32-bit quantity. This unbreaks ppc64 codegen when
the code is actually located above the 4G boundary.
llvm-svn: 31734
2006-11-14 18:44:47 +00:00
b542925b22
remove a ton of custom selection logic no longer needed
...
llvm-svn: 31733
2006-11-14 18:43:11 +00:00
97ff46b3cc
lower "X = seteq Y, Z" to '(shr (ctlz (xor Y, Z)), 5)' instead of
...
'(shr (ctlz (sub Y, Z)), 5)'.
The use of xor better exposes the operation to bit-twiddling logic in the
dag combiner. For example, this:
typedef struct {
unsigned prefix : 4;
unsigned code : 4;
unsigned unsigned_p : 4;
} tree_common;
int foo(tree_common *a, tree_common *b) {
return a->code == b->code;
}
Now compiles to:
_foo:
lwz r2, 0(r4)
lwz r3, 0(r3)
xor r2, r3, r2
rlwinm r2, r2, 28, 28, 31
cntlzw r2, r2
srwi r3, r2, 5
blr
instead of:
_foo:
lbz r2, 3(r4)
lbz r3, 3(r3)
srwi r2, r2, 4
srwi r3, r3, 4
subf r2, r2, r3
cntlzw r2, r2
srwi r3, r2, 5
blr
saving a cycle.
llvm-svn: 31725
2006-11-14 05:28:08 +00:00
683712583a
minor tweaks, reject vector preinc.
...
llvm-svn: 31717
2006-11-14 01:38:31 +00:00
dbd3d294e6
Matches MachineInstr changes.
...
llvm-svn: 31712
2006-11-13 23:36:35 +00:00
1121e50f7e
teach the g5 hazard recognizer about update loads. This fixes
...
Ptrdist/anagram among others.
llvm-svn: 31708
2006-11-13 20:11:06 +00:00
1dfc6110ff
Make sure stack link is set in 64-bit.
...
llvm-svn: 31690
2006-11-11 22:22:07 +00:00
0d550cc56c
implement proper PPC64 prolog/epilog codegen.
...
llvm-svn: 31684
2006-11-11 19:05:28 +00:00
66c502b54a
Running with frame pointers prevented debugging, external probes and
...
potentially some system calls/exception handling from working. TOS must always
link to previous frame. This is a short term workaround until alloca scheme is
reworked.
llvm-svn: 31677
2006-11-11 10:21:58 +00:00
c5102bfc7c
allow the offset of a preinc'd load to be the low-part of a global. This
...
produces this clever code:
_millisecs:
lis r2, ha16(_Time.1182)
lwzu r3, lo16(_Time.1182)(r2)
lwz r2, 4(r2)
addic r4, r2, 1
addze r3, r3
blr
instead of this:
_millisecs:
lis r2, ha16(_Time.1182)
la r3, lo16(_Time.1182)(r2)
lwz r2, lo16(_Time.1182)(r2)
lwz r3, 4(r3)
addic r4, r3, 1
addze r3, r2
blr
for:
long %millisecs() {
%tmp = load long* %Time.1182 ; <long> [#uses=1]
%tmp1 = add long %tmp, 1 ; <long> [#uses=1]
ret long %tmp1
}
llvm-svn: 31673
2006-11-11 04:53:30 +00:00
2ff632c54b
Mark operands as symbol lo instead of imm32 so that they print lo(x) around
...
globals.
llvm-svn: 31672
2006-11-11 04:51:36 +00:00
b314b155ed
ppc64 doesn't have lwau, don't attempt to form it.
...
llvm-svn: 31656
2006-11-11 00:08:42 +00:00
c9fa36d706
implement preinc support for r+i loads on ppc64
...
llvm-svn: 31654
2006-11-10 23:58:45 +00:00
6c8656a6b1
dform 8/9 are identical to dform 1
...
llvm-svn: 31637
2006-11-10 17:51:02 +00:00
ce6455489a
add an initial cut at preinc loads for ppc32. This is broken for ppc64
...
(because the 64-bit reg target versions aren't implemented yet), doesn't
support r+r addr modes, and doesn't handle stores, but it works otherwise. :)
This is disabled unless -enable-ppc-preinc is passed to llc for now.
llvm-svn: 31621
2006-11-10 02:08:47 +00:00
cd436327f1
add note about ugly codegen with preinc
...
llvm-svn: 31617
2006-11-10 01:33:53 +00:00
36a8fbf771
PPC supports i32 / i64 pre-inc load / store.
...
llvm-svn: 31599
2006-11-09 19:11:50 +00:00
b15000736c
Rename ISD::MemOpAddrMode to ISD::MemIndexedMode
...
llvm-svn: 31595
2006-11-09 17:55:04 +00:00
6cd0909da7
Match tblegen changes.
...
llvm-svn: 31571
2006-11-08 20:34:28 +00:00
a801fcedd3
Refactor all the addressing mode selection stuff into the isel lowering
...
class, where it can be used for preinc formation.
llvm-svn: 31536
2006-11-08 02:15:41 +00:00
6a5a4f85d3
correct the (currently unused) pattern for lwzu.
...
llvm-svn: 31535
2006-11-08 02:13:12 +00:00
be7033b346
add a note from viterbi
...
llvm-svn: 31506
2006-11-07 18:30:21 +00:00
d94477f6c9
fix encoding of BLR
...
llvm-svn: 31485
2006-11-07 01:51:50 +00:00
2959789c92
encode BLR predicate info for the JIT
...
llvm-svn: 31450
2006-11-04 05:42:48 +00:00
6be726048e
Go through all kinds of trouble to mark 'blr' as having a predicate operand
...
that takes a register and condition code. Print these pieces of BLR the
right way, even though it is currently set to 'always'.
Next up: get the JIT encoding right, then enhance branch folding to produce
predicated blr for simple examples.
llvm-svn: 31449
2006-11-04 05:27:39 +00:00
c8a68d08c3
Describe PPC predicates, which are a pair of CR# and condition.
...
llvm-svn: 31438
2006-11-03 23:53:25 +00:00
895d199348
remove dead vars
...
llvm-svn: 31433
2006-11-03 23:46:45 +00:00
2de0910a1b
fix a bug reid noticed
...
llvm-svn: 31385
2006-11-02 23:39:53 +00:00
de46e48420
For PR786:
...
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.
llvm-svn: 31380
2006-11-02 20:25:50 +00:00
584a11ae22
Implement the getRegForInlineAsmConstraint method for PPC. With recent
...
sdisel changes, this eliminates a ton of copies around common inline asms.
For example:
int test2(int Y, int X) {
asm("foo %0, %1" : "=r"(X): "r"(X));
return X;
}
now compiles to:
_test2:
foo r3, r4
blr
instead of:
_test2:
mr r2, r4
foo r2, r2
mr r3, r2
blr
GCC produces:
_test2:
foo r4, r4
mr r3,r4
blr
llvm-svn: 31367
2006-11-02 01:44:04 +00:00
8c6949e5b2
Change the prototype for TargetLowering::isOperandValidForConstraint
...
llvm-svn: 31318
2006-10-31 19:40:43 +00:00
aa4c0f9374
1. Clean up code due to changes in SwitchTo*Section(2)
...
2. Added partial debug support for mingw\cygwin targets (the same as
Linux\ELF). Please note, that currently mingw\cygwin uses 'stabs' format
for storing debug info by default, thus many (runtime) libraries has
this information included. These formats shouldn't be mixed in one binary
('stabs' & 'DWARF'), otherwise binutils tools will be confused.
llvm-svn: 31311
2006-10-31 08:31:24 +00:00
3e36e07db2
fix miscompilation of llvm.isunordered, where we branched on the opposite
...
condition. This fixes miscompilation of Olden/bh and many others.
llvm-svn: 31301
2006-10-30 23:02:25 +00:00
0d41d19427
All targets expand BR_JT for now.
...
llvm-svn: 31294
2006-10-30 08:02:39 +00:00
113f7470e6
implement the BlockHasNoFallThrough hook
...
llvm-svn: 31264
2006-10-28 17:35:02 +00:00
ae8c29a7d3
Doh. Must check if GV is constant first before putting it in .cstring.
...
llvm-svn: 31253
2006-10-28 05:56:51 +00:00
acc6b37d0d
don't dist internal readme's
...
llvm-svn: 31246
2006-10-28 00:49:54 +00:00
28174f5a3a
this doesn't occur any more in mason
...
llvm-svn: 31236
2006-10-27 22:02:19 +00:00
4c0cc53da1
the code in question is now:
...
cmpw cr0, r7, r3
ble cr0, LBB1_5 ;bb25
LBB1_8: ;bb17
cmpw cr0, r8, r5
bgt cr0, LBB1_2 ;bb
which is just as good as crnand.
llvm-svn: 31235
2006-10-27 22:00:55 +00:00
e1e06c2de8
Place cstrings in .cstring section.
...
llvm-svn: 31207
2006-10-26 21:48:57 +00:00
71b99297aa
Move getPreferredAlignmentLog from AsmPrinter to TargetData
...
llvm-svn: 31171
2006-10-24 20:32:14 +00:00
d43e8a7429
Add intrinsics for the rest of the DCB* instructions.
...
llvm-svn: 31148
2006-10-24 01:08:42 +00:00
23f22de26f
Implement support for branch reversal, fix a bug in branch analysis.
...
This provides stuff like:
cmpw cr0, r15, r29
mr r14, r15
- bge cr0, LBB3_111 ;bb656
- b LBB3_90 ;bb501
+ blt cr0, LBB3_90 ;bb501
LBB3_111: ;bb656
lwz r18, 68(r1)
which is particularly good for dispatch group formation.
llvm-svn: 31101
2006-10-21 06:03:11 +00:00
d881660366
Simplify code, no functionality change
...
llvm-svn: 31097
2006-10-21 05:42:09 +00:00
94e04442eb
implement support for inserting a cond branch
...
llvm-svn: 31096
2006-10-21 05:36:13 +00:00
454436dcc5
set the ppc64 stack pointer right, dynamic alloca now works for ppc64
...
llvm-svn: 31028
2006-10-18 01:20:43 +00:00
ab4df83426
Expand alloca for ppc64
...
llvm-svn: 31027
2006-10-18 01:18:48 +00:00
0408e5b7ce
expose DWARF_LABEL opcode# so the branch folder can update debug info properly.
...
llvm-svn: 31024
2006-10-17 22:41:45 +00:00
a61f0105bd
add support for inserting an uncond branch
...
llvm-svn: 31003
2006-10-17 18:06:55 +00:00
2794184191
Use S_debug for dwarf info.
...
llvm-svn: 30994
2006-10-17 11:30:57 +00:00
a47294ed7a
implement branch inspection/modification methods.
...
llvm-svn: 30946
2006-10-13 21:21:17 +00:00
ab51cf2e78
Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
...
llvm-svn: 30945
2006-10-13 21:14:26 +00:00
be131662c3
add note
...
llvm-svn: 30937
2006-10-13 20:20:58 +00:00
cf56917053
set isBarrier correctly
...
llvm-svn: 30936
2006-10-13 19:10:34 +00:00
4dc4f30a48
Correctly handle instruction separators.
...
llvm-svn: 30935
2006-10-13 17:56:02 +00:00
7374bc0577
mark adjcallstack up/down as clobbering and using the SP
...
llvm-svn: 30908
2006-10-12 17:56:34 +00:00
577ef7694e
Add properties to ComplexPattern.
...
llvm-svn: 30891
2006-10-11 21:03:53 +00:00
e71fe34d75
Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.
...
llvm-svn: 30844
2006-10-09 20:57:25 +00:00
df9ac47e5e
Make use of getStore().
...
llvm-svn: 30759
2006-10-05 23:01:46 +00:00
8cfd10eff3
Don't bother setting JumpTableTextSection, it is about to disappear
...
llvm-svn: 30745
2006-10-05 03:13:59 +00:00
a6a570e02f
Pass the MachineFunction into EmitJumpTableInfo.
...
llvm-svn: 30742
2006-10-05 03:01:21 +00:00
028d663ee6
Move getSectionForFunction to AsmPrinter, change it to return a string.
...
llvm-svn: 30735
2006-10-05 02:42:20 +00:00
0d236450aa
implement DarwinTargetAsmInfo::getSectionForFunction, use it when outputting
...
function bodies
llvm-svn: 30733
2006-10-05 00:35:50 +00:00
41e22a5419
emit jump table before debug info
...
llvm-svn: 30731
2006-10-05 00:26:05 +00:00
aad26a19f0
Always emit the jump table after the function so it's part of the same 'atom'
...
as the function body.
llvm-svn: 30730
2006-10-05 00:24:46 +00:00
5d9fd977d3
Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
...
extra operand to LOADX to specify the exact value extension type.
llvm-svn: 30714
2006-10-04 00:56:09 +00:00
d32cb5ee7f
wrap long lines
...
llvm-svn: 30662
2006-09-28 23:32:43 +00:00
78370606d0
Shift amounts are always 32-bits, even in 64-bit mode. This fixes
...
CodeGen/PowerPC/2006-09-28-shift_64.ll
llvm-svn: 30652
2006-09-28 20:48:45 +00:00
67f8cc51f4
Use abstract private/comment directives, to increase portability to ppc/linux
...
llvm-svn: 30621
2006-09-27 02:55:21 +00:00
ad4e7eb59e
Compile:
...
int x __attribute__((used));
to:
.data
.comm _x,4 ; 'x'
.no_dead_strip _x
on both x86 and ppc darwin targets.
llvm-svn: 30605
2006-09-26 03:39:53 +00:00
d31efd190f
Fold AND and ROTL more often
...
llvm-svn: 30577
2006-09-22 05:01:56 +00:00
a81a75c390
The DarwinAsmPrinter need not check for isDarwin. createPPCAsmPrinterPass
...
should create the right asmprinter subclass.
llvm-svn: 30542
2006-09-20 17:12:19 +00:00
8597a2fc4e
Wrap some darwin'isms with isDarwin checks.
...
llvm-svn: 30541
2006-09-20 17:07:15 +00:00
fba9e8f422
item done
...
llvm-svn: 30518
2006-09-20 06:41:56 +00:00
f62f090ea1
This is already done
...
llvm-svn: 30512
2006-09-20 04:59:33 +00:00
da9b1a9322
Improve PPC64 equality comparisons like PPC32 comparisons.
...
llvm-svn: 30510
2006-09-20 04:33:27 +00:00
aa3926b7ea
Two improvements:
...
1. Codegen this comparison:
if (X == 0x8000)
as:
cmplwi cr0, r3, 32768
bne cr0, LBB1_2 ;cond_next
instead of:
lis r2, 0
ori r2, r2, 32768
cmpw cr0, r3, r2
bne cr0, LBB1_2 ;cond_next
2. Codegen this comparison:
if (X == 0x12345678)
as:
xoris r2, r3, 4660
cmplwi cr0, r2, 22136
bne cr0, LBB1_2 ;cond_next
instead of:
lis r2, 4660
ori r2, r2, 22136
cmpw cr0, r3, r2
bne cr0, LBB1_2 ;cond_next
llvm-svn: 30509
2006-09-20 04:25:47 +00:00
ab33d350a7
Add a note that we should match rlwnm better
...
llvm-svn: 30508
2006-09-20 03:59:25 +00:00
601b86513d
Legalize is no longer limited to cleverness with just constant shift amounts.
...
Allow it to be clever when possible and fall back to the gross code when needed.
This allows us to compile:
long long foo1(long long X, int C) {
return X << (C|32);
}
long long foo2(long long X, int C) {
return X << (C&~32);
}
to:
_foo1:
rlwinm r2, r5, 0, 27, 31
slw r3, r4, r2
li r4, 0
blr
.globl _foo2
.align 4
_foo2:
rlwinm r2, r5, 0, 27, 25
subfic r5, r2, 32
slw r3, r3, r2
srw r5, r4, r5
or r3, r3, r5
slw r4, r4, r2
blr
instead of:
_foo1:
ori r2, r5, 32
subfic r5, r2, 32
addi r6, r2, -32
srw r5, r4, r5
slw r3, r3, r2
slw r6, r4, r6
or r3, r3, r5
slw r4, r4, r2
or r3, r3, r6
blr
.globl _foo2
.align 4
_foo2:
rlwinm r2, r5, 0, 27, 25
subfic r5, r2, 32
addi r6, r2, -32
srw r5, r4, r5
slw r3, r3, r2
slw r6, r4, r6
or r3, r3, r5
slw r4, r4, r2
or r3, r3, r6
blr
llvm-svn: 30507
2006-09-20 03:47:40 +00:00
3c48ea54ee
Fold the PPCISD shifts when presented with 0 inputs. This occurs for code
...
like:
long long test(long long X, int Y) {
return 1ULL << Y;
}
long long test2(long long X, int Y) {
return -1LL << Y;
}
which we used to compile to:
_test:
li r2, 1
subfic r3, r5, 32
li r4, 0
addi r6, r5, -32
srw r3, r2, r3
slw r4, r4, r5
slw r6, r2, r6
or r3, r4, r3
slw r4, r2, r5
or r3, r3, r6
blr
_test2:
li r2, -1
subfic r3, r5, 32
addi r6, r5, -32
srw r3, r2, r3
slw r4, r2, r5
slw r2, r2, r6
or r3, r4, r3
or r3, r3, r2
blr
Now we produce:
_test:
li r2, 1
addi r3, r5, -32
subfic r4, r5, 32
slw r3, r2, r3
srw r4, r2, r4
or r3, r4, r3
slw r4, r2, r5
blr
_test2:
li r2, -1
subfic r3, r5, 32
addi r6, r5, -32
srw r3, r2, r3
slw r4, r2, r5
slw r2, r2, r6
or r3, r4, r3
or r3, r3, r2
blr
llvm-svn: 30479
2006-09-19 05:22:59 +00:00
2aa98e0363
add a note
...
llvm-svn: 30377
2006-09-14 20:56:30 +00:00
9a083a4121
Reflects MachineConstantPoolEntry changes.
...
llvm-svn: 30279
2006-09-12 21:04:05 +00:00
a0d95a8da9
Behold, more work on relocations. Things are looking pretty good now.
...
llvm-svn: 30240
2006-09-10 23:03:44 +00:00
69df6132d7
First pass at supporting relocations. Relocations are written correctly to
...
the file now, however the relocated address is currently wrong. Fixing
that will require some deep pondering.
llvm-svn: 30207
2006-09-08 22:42:09 +00:00
177405376c
Missing tab
...
llvm-svn: 30188
2006-09-08 13:06:56 +00:00
c9db83306f
We actually do support object file writing, so don't return true (error)
...
llvm-svn: 30173
2006-09-08 03:42:15 +00:00
ae92ce8798
1. Remove condition on delete.
...
2. Protect and outline createTargetAsmInfo.
3. Misc. kruft.
llvm-svn: 30169
2006-09-07 23:39:26 +00:00
261779bb45
Make target asm info a property of the target machine.
...
llvm-svn: 30162
2006-09-07 22:06:40 +00:00
Evan Cheng