Make it configurable what to profile.
For Mac, we don't use the dirty page size yet and hence there is no need to gather that. This should be way better in not draining the battery since we are operating between 0% to 0.1% on the Mac after this change.
llvm-svn: 176451
own port namepsace) as the thread identifier to using the system-wide
globally unique thread id as the thread identifier number.
MachThread.cpp keeps both the unique id and the mach port number
for each thread. All layers outside MachThread class use the unique
id with three exceptions: (1) Mach exceptions come in with the port
number (thread_port) which needs to be translated, (2) any calls to
low-level thread_get_state/thread_set_state/thread_suspend etc need
to use the mach port number, (3) MachThreadList::UpdateThreadList
which creates the MachThread objects gets the unique id and passes
it to the MachThread ctor as an argument.
In general, any time nub_thread_t is used, it is now referring to a
unique thread id. Any time a thread_t is used, it is now referring
to a mach port number. There was some interchangability of these
types previously. nub_thread_t has also been changed to a 64-bit
type which necessitated some printf specification string changes.
I haven't been able to test these changes extensively yet but want
to checkpoint the work. The scenarios I've been testing are all
working correctly so while there may be some corner cases I haven't
hit yet, I think it is substantially correct.
<rdar://problem/12931414>
llvm-svn: 175870
Fixed the 32, 16, and 8 bit pseudo regs for x86_64 (real reg of "rax" which subvalues "eax", "ax", etc...) to correctly get updated when stepping. Also fixed it so actual registers can specify what other registers must be invalidated when a register is modified. Previously, only pseudo registers could invalidate other registers.
Modified the LLDB qRegisterInfo extension to the GDB remote interface to support specifying the containing registers with the new "container-regs" key whose value is a comma separated list of register numbers. Also added a "invalidate-regs" key whose value is also a comma separated list of register numbers.
Removed the hack GDBRemoteDynamicRegisterInfo::Addx86_64ConvenienceRegisters() function and modified "debugserver" to specify the registers correctly using the new "container-regs" and "invalidate-regs" keys.
llvm-svn: 173096
from a process and hooked it up to the new packet that was recently added
to our GDB remote executable named debugserver. Now Process has the following
new calls:
virtual Error
Process::GetMemoryRegionInfo (lldb::addr_t load_addr, MemoryRegionInfo &range_info);
virtual uint32_t
GetLoadAddressPermissions (lldb::addr_t load_addr);
Only the first one needs to be implemented by subclasses that can add this
support.
Cleaned up the way the new packet was implemented in debugserver to be more
useful as an API inside debugserver. Also found an error where finding a region
for an address actually will pick up the next region that follows the address
in the query so we also need ot make sure that the address we requested the
region for falls into the region that gets returned.
llvm-svn: 144976
the appropriate registers for arm and x86_64. The register names for the
arguments that are the size of a pointer or less are all named "arg1", "arg2",
etc. This allows you to read these registers by name:
(lldb) register read arg1 arg2 arg3
...
You can also now specify you want to see alternate register names when executing
the read register command:
(lldb) register read --alternate
(lldb) register read -A
llvm-svn: 131376
Han Ming Ong