Commit Graph

11 Commits

Author SHA1 Message Date
Roman Lebedev 6030fe01f4
[llvm-exegesis] Exploring X86::OperandType::OPERAND_COND_CODE
Summary:
Currently, we only have nice exploration for LEA instruction,
while for the rest, we rely on `randomizeUnsetVariables()`
to sometimes generate something interesting.
While that works, it isn't very reliable in coverage :)

Here, i'm making an assumption that while we may want to explore
multi-instruction configs, we are most interested in the
characteristics of the main instruction we were asked about.

Which we can do, by taking the existing `randomizeMCOperand()`,
and turning it on it's head - instead of relying on it to randomly fill
one of the interesting values, let's pregenerate all the possible interesting
values for the variable, and then generate as much `InstructionTemplate`
combinations of these possible values for variables as needed/possible.

Of course, that requires invasive changes to no longer pass just the
naked `Instruction`, but sometimes partially filled `InstructionTemplate`.

As it can be seen from the test, this allows us to explore
`X86::OperandType::OPERAND_COND_CODE` for instructions
that take such an operand.
I'm hoping this will greatly simplify exploration.

Reviewers: courbet, gchatelet

Reviewed By: gchatelet

Subscribers: orodley, mgorny, sdardis, tschuett, jrtc27, atanasyan, mstojanovic, andreadb, RKSimon, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74156
2020-02-12 21:33:52 +03:00
Miloš Stojanović 24b7b99b7d [llvm-exegesis][NFC] Disassociate snippet generators from benchmark runners
The addition of `inverse_throughput` mode highlighted the disjointedness
of snippet generators and benchmark runners because it used the
`UopsSnippetGenerator` with the  `LatencyBenchmarkRunner`.
To keep the code consistent tie the snippet generators to
parallelization/serialization rather than their benchmark runners.

Renaming `LatencySnippetGenerator` -> `SerialSnippetGenerator`.
Renaming `UopsSnippetGenerator` -> `ParallelSnippetGenerator`.

Differential Revision: https://reviews.llvm.org/D72928
2020-01-20 16:19:13 +01:00
Miloš Stojanović ea91758a3c [llvm-exegesis][mips] Add support for memory instructions
Implementing functions used to enable testing of memory instructions.

Differential Revision: https://reviews.llvm.org/D72858
2020-01-17 13:26:09 +01:00
Miloš Stojanović 6b35786649 [llvm-exegesis][mips] Add RegisterAliasingTest unit test
Differential Revision: https://reviews.llvm.org/D72004
2020-01-16 17:50:45 +01:00
Miloš Stojanović 31458a9fee [llvm-exegesis][NFC] Refactor Mips tests fixtures into a base class.
Differential Revision: https://reviews.llvm.org/D72003
2020-01-16 17:50:44 +01:00
Tom Stellard 0dbcb36394 CMake: Make most target symbols hidden by default
Summary:
For builds with LLVM_BUILD_LLVM_DYLIB=ON and BUILD_SHARED_LIBS=OFF
this change makes all symbols in the target specific libraries hidden
by default.

A new macro called LLVM_EXTERNAL_VISIBILITY has been added to mark symbols in these
libraries public, which is mainly needed for the definitions of the
LLVMInitialize* functions.

This patch reduces the number of public symbols in libLLVM.so by about
25%.  This should improve load times for the dynamic library and also
make abi checker tools, like abidiff require less memory when analyzing
libLLVM.so

One side-effect of this change is that for builds with
LLVM_BUILD_LLVM_DYLIB=ON and LLVM_LINK_LLVM_DYLIB=ON some unittests that
access symbols that are no longer public will need to be statically linked.

Before and after public symbol counts (using gcc 8.2.1, ld.bfd 2.31.1):
nm before/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l
36221
nm after/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l
26278

Reviewers: chandlerc, beanz, mgorny, rnk, hans

Reviewed By: rnk, hans

Subscribers: merge_guards_bot, luismarques, smeenai, ldionne, lenary, s.egerton, pzheng, sameer.abuasal, MaskRay, wuzish, echristo, Jim, hiraditya, michaelplatings, chapuni, jholewinski, arsenm, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, javed.absar, sbc100, jgravelle-google, aheejin, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, zzheng, edward-jones, mgrang, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, kristina, jsji, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D54439
2020-01-14 19:46:52 -08:00
Miloš Stojanović 804dd67227 [llvm-exegesis][mips] Expand loadImmediate()
Add support for loading 32-bit immediates and enable the use of GPR64
registers.

Differential Revision: https://reviews.llvm.org/D71873
2020-01-13 12:32:13 +01:00
Guillaume Chatelet 32d384c020 [llvm-exegesis][NFC] internal changes
Summary:
BitVectors are now cached to lower memory utilization.
Instructions have reference semantics.

Reviewers: courbet

Subscribers: sdardis, tschuett, jrtc27, atanasyan, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71653
2019-12-18 17:24:07 +01:00
Miloš Stojanović 0add79aec2 [llvm-exegesis][mips] Add SnippetGeneratorTest unit test
Test latency with explicit register dependency, without and with
forbidden registers.

Differential Revision: https://reviews.llvm.org/D71471
2019-12-16 16:50:03 +01:00
Miloš Stojanović 84728e65e9 [llvm-exegesis][mips] Add BenchmarkResultTest unit test
Test writing and reading benchmark instructions to and from disc, and
check calculations of min, max and avg values from a list of benchmark
measures.

Differential Revision: https://reviews.llvm.org/D71265
2019-12-13 17:02:19 +01:00
Simon Atanasyan cf1ba238d4 [Mips][llvm-exegesis] Add a Mips target
The target does just enough to be able to run llvm-exegesis in latency
mode for at least some opcodes.

Patch by Miloš Stojanović.

Differential Revision: https://reviews.llvm.org/D68649

llvm-svn: 374590
2019-10-11 20:26:08 +00:00