5a82613db0
Soft float support for FREM.
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llvm-svn: 68614
2009-04-08 16:20:57 +00:00
fb438caac6
Soft float support for undef. Reported by Xerxes Rånby.
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llvm-svn: 68607
2009-04-08 13:33:37 +00:00
0669f6d295
Handle 'a' modifier in ARM inline assembly.
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Patch by Richard Pennington.
llvm-svn: 68464
2009-04-06 21:46:51 +00:00
cf1ec2cc68
Fix PR3862: Recognize some ARM-specific constraints for immediates in inline
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assembly.
llvm-svn: 68218
2009-04-01 17:58:54 +00:00
a774a99245
Do not emit comments unless -asm-verbose.
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llvm-svn: 67580
2009-03-24 00:17:40 +00:00
7b87e542dc
add no-unwind, remove duplicate run line.
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llvm-svn: 66775
2009-03-12 05:56:37 +00:00
ce5dfb692a
ARM isLegalAddressImmediate should check if type is a simple type now that optimizer can create values of funky scalar types.
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llvm-svn: 66429
2009-03-09 19:15:00 +00:00
ec415efb44
Recognize triplets starting with armv5-, armv6- etc. And set the ARM arch version accordingly.
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llvm-svn: 66365
2009-03-08 04:02:49 +00:00
de22116f39
If a MI uses the same register more than once, only mark one of them as 'kill'.
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llvm-svn: 66363
2009-03-08 03:58:35 +00:00
398dee1c4a
Last commit accidentially deleted this code.
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llvm-svn: 65679
2009-02-28 06:02:14 +00:00
ca2d65467b
The last commit was overly conservative. It's ok to reuse value that's already marked livein.
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llvm-svn: 65498
2009-02-26 03:02:21 +00:00
e779595af0
If a use operand is marked isKill, don't forget to add kill to its live interval as well.
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llvm-svn: 65279
2009-02-22 08:35:56 +00:00
f505cd5ebb
A couple of places where reused use operands should be marked kill. This is exposed by recent availability fallthrough changes.
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llvm-svn: 64745
2009-02-17 06:41:03 +00:00
3a14efacb6
Replace one of burr scheduling heuristic with something more sensible. Now calcMaxScratches simply compute the number of true data dependencies. This actually improve a couple of tests in dejagnu suite as many tests in llvm nightly test suite.
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llvm-svn: 64369
2009-02-12 08:59:45 +00:00
ce3bbe515b
Fix PR3457: Ignore control successors when looking for closest scheduled successor. A control successor doesn't read result(s) produced by the scheduling unit being evaluated.
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llvm-svn: 64210
2009-02-10 08:30:11 +00:00
f736bd9c79
Re-enable machine sinking pass now that the coalescer bugs and the AnalyzeBrnach bug are fixed.
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llvm-svn: 64126
2009-02-09 08:45:39 +00:00
5469ec1072
Revert r63999. It was breaking self-hosting builds.
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llvm-svn: 64062
2009-02-08 00:58:05 +00:00
9571621665
Enable machine sinking pass in non-fast mode.
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llvm-svn: 63999
2009-02-07 01:57:46 +00:00
409c25f78d
Turn on machine LICM in non-fast mode.
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llvm-svn: 63855
2009-02-05 08:46:33 +00:00
6de96a1b5d
Add the private linkage.
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llvm-svn: 62279
2009-01-15 20:18:42 +00:00
ab85feb91c
Clean up some ARM GV asm printing out; minor fixes to match what gcc does.
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llvm-svn: 60621
2008-12-06 02:00:55 +00:00
c22215a090
- Register scavenger should use MachineRegisterInfo and internal map to find the first use of a register after a given machine instruction.
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- When scavenging a register, in addition to the spill, insert a restore before the first use.
- Abort if client is looking to scavenge a register even when a previously scavenged register is still live.
llvm-svn: 59697
2008-11-20 02:32:35 +00:00
3095c32c89
Register scavenger should process early clobber defs first. A dead early clobber def should not interfere with a normal def which happens one slot later.
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llvm-svn: 59559
2008-11-18 22:28:38 +00:00
e3827d9061
Actually ARM / Mac OS X does have UINTTOFP_I64_F{64|32} libcalls.
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llvm-svn: 58725
2008-11-04 22:19:55 +00:00
297b32a367
Custom lower bit_convert i64 -> f64 into FMDRR. This is now happening with legalizetypes.
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llvm-svn: 58714
2008-11-04 19:57:48 +00:00
9eb525d4f9
Implement function notes as function attributes.
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llvm-svn: 56716
2008-09-26 23:51:19 +00:00
f3fcd7a464
Unallocatable registers do not have live intervals.
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llvm-svn: 56287
2008-09-17 18:36:25 +00:00
3c7b9ba547
Re-enable SelectionDAG CSE for calls. It matters in the case of
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libcalls, as in this testcase on ARM.
llvm-svn: 56226
2008-09-15 19:46:03 +00:00
02acc35abd
Correctly update kill infos after extending a live range and merge 2 val#'s; fix 56165 - do not mark val# copy field if the copy does not define the val#.
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llvm-svn: 56199
2008-09-15 06:28:41 +00:00
f4e5de4583
Legalizer was missing code that expand fpow to a libcall.
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llvm-svn: 56028
2008-09-09 23:02:14 +00:00
655fa0fec4
It's not legal to output a GV in a coalesced section if it's used in an ARM PIC relative constantpool.
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llvm-svn: 54519
2008-08-08 06:56:16 +00:00
9dbbd75068
Print section flags ok on platforms, which use '@' as comment string. Fix test.
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llvm-svn: 54460
2008-08-07 09:55:06 +00:00
04c047ddca
This check is unnecessary, and getting rid of it removes a use of -disable-correct-folding.
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llvm-svn: 54355
2008-08-05 17:52:54 +00:00
252fa16db1
Remove the need for -disable-correct-folding from this test.
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llvm-svn: 54354
2008-08-05 17:49:52 +00:00
5018bd032a
Update these tests to work by disabling the new correct CFG generation. This flag should ONLY be used to for tests like these.
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llvm-svn: 54334
2008-08-04 23:55:29 +00:00
c90a11256e
Teach ARM isLegalAddressingMode to handle unknown type without crashing. This fixes pr2589.
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llvm-svn: 54004
2008-07-25 00:55:17 +00:00
6b418e750d
Softfloat support for FDIV. Patch by
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Richard Pennington.
llvm-svn: 53773
2008-07-18 21:18:48 +00:00
1e427c3264
sabre brings to my attention that the 'tr' suffix is also obsolete
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llvm-svn: 51349
2008-05-20 21:00:03 +00:00
f45ff35bfe
Rename the last test with .llx extension to .ll, resolve duplicate test by renaming to isnan2. Now that no test has llx ending there is no need to search for them from dg.exp too.
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llvm-svn: 51328
2008-05-20 19:52:04 +00:00
0609ab646b
More local spiller complexity!
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If local spiller optimization turns some instruction into an identity copy, it will be removed. If the output register happens to be dead (and source is obviously killed), transfer the kill / dead information to last use / def in the same MBB.
llvm-svn: 51306
2008-05-20 08:13:21 +00:00
c8b028daa4
Don't spill dead def.
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llvm-svn: 51305
2008-05-20 08:10:37 +00:00
33281864c1
If a PHI node has a single implicit_def source, replace it with an implicit_def instead of a copy.
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llvm-svn: 49543
2008-04-11 17:54:45 +00:00
b53d560150
New test.
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llvm-svn: 49514
2008-04-10 23:49:09 +00:00
b5fdc923d3
1. IMPLICIT_DEF can *re-define* any register.
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2. Coalescer can now create an interesting situation where a register def can
reaches itself without being killed.
llvm-svn: 49246
2008-04-05 01:27:09 +00:00
0bd72c5ccd
More soft fp fixes.
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llvm-svn: 49016
2008-04-01 02:18:22 +00:00
86e476b7cb
Unbreak ARM / Thumb soft FP support.
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llvm-svn: 49012
2008-04-01 01:50:16 +00:00
39a3221e27
Fixed a register scavenger bug. If a def is re-defining part of a super register, there must be an implicit def of the super-register on the MI.
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llvm-svn: 48024
2008-03-07 20:12:54 +00:00
a3cb090446
Constant fold SIGN_EXTEND_INREG with ashr not lshr.
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llvm-svn: 47992
2008-03-06 08:20:51 +00:00
16f1e0be3d
DCE'ed this testcase.
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llvm-svn: 47760
2008-02-29 19:28:11 +00:00
811153a551
If we reload a virtual register that's already been assigned, we want to mark
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that instruction as its "last use". This fixes PR1925.
llvm-svn: 47758
2008-02-29 18:52:01 +00:00
Duncan Sands