Commit Graph

5 Commits

Author SHA1 Message Date
Qiu Chaofan 67c64d8337 [PowerPC] Implement scheduling model for Power10
Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D110855
2021-10-18 15:27:49 +08:00
Jinsong Ji 42eea2b69b [AIX] Enable int128 in 64 bit mode
This patch remove the override in AIX target,
so the int128 is enabled in 64 bit mode or with ForceEnableInt128.

Reviewed By: lkail

Differential Revision: https://reviews.llvm.org/D111078
2021-10-15 16:23:04 +00:00
Jinsong Ji 933e2469a2 [PowerPC][NFC] Remove reg name option in int128 test
The test is generated by script, so we don't really need the regname to
be meaniful here.

AIX doesn't support the reg name option, removing it for now so that we
can reuse the CHECKs for AIX triple as well.
2021-10-04 15:31:25 +00:00
Amy Kwan 5041a485b9 [PowerPC] Exploit Prefixed Load/Stores using the refactored Load/Store Implementation
This patch exploits the prefixed load and store instructions utilizing the
refactored load/store implementation introduced in D93370.

Prefixed load and store instructions are emitted whenever we are loading or
storing a value with an offset that fits into a 34-bit signed immediate.
Patterns for the prefixed load and stores are added in this patch, as well as
the implementation that detects when we are loading and storing a value with an
offset that fits in 34-bits.

Differential Revision: https://reviews.llvm.org/D96075
2021-09-14 08:39:49 -05:00
Amy Kwan e582c073d1 [NFC][PowerPC] Add additional load/store test cases
This patch adds additional load/store test cases involving scalars, vectors,
and PC-Rel in preparation for the refactored load and store implementation
introduced in D93370.

Differential Revision: https://reviews.llvm.org/D97391
2021-03-15 08:54:38 -05:00