llvm-project

Author SHA1 Message Date

Author	SHA1	Message	Date
Qiu Chaofan	033c9c2552	[PowerPC] Fix use check of swap-reduction This will fix swap-reduction in DAGISel for cases where COPY_TO_REGCLASS has multiple uses.	2021-04-07 15:55:52 +08:00
Qiu Chaofan	72c4cbd60e	[PowerPC] Fix multi-use case for swap reduction `4c973ae` implemented reduction of vector swap for lane-insensitive operations. This commit fixes it for checking number of uses of the vector operation.	2021-03-11 21:58:33 +08:00
Qiu Chaofan	4c973ae51b	[PowerPC] Reduce symmetrical swaps for lane-insensitive vector ops This patch simplifies pattern (xxswap (vec-op (xxswap a) (xxswap b))) into (vec-op a b) if vec-op is lane-insensitive. The motivating case is ScalarToVector-VecOp-ExtractElement sequence on LE, but the peephole itself is not related to endianness, so BE may also benefit from this. Reviewed By: nemanjai Differential Revision: https://reviews.llvm.org/D97658	2021-03-10 15:21:32 +08:00

Qiu Chaofan

033c9c2552

[PowerPC] Fix use check of swap-reduction

This will fix swap-reduction in DAGISel for cases where COPY_TO_REGCLASS
has multiple uses.

2021-04-07 15:55:52 +08:00

Qiu Chaofan

72c4cbd60e

[PowerPC] Fix multi-use case for swap reduction

4c973ae implemented reduction of vector swap for lane-insensitive
operations. This commit fixes it for checking number of uses of the
vector operation.

2021-03-11 21:58:33 +08:00

Qiu Chaofan

4c973ae51b

[PowerPC] Reduce symmetrical swaps for lane-insensitive vector ops

This patch simplifies pattern (xxswap (vec-op (xxswap a) (xxswap b)))
into (vec-op a b) if vec-op is lane-insensitive. The motivating case
is ScalarToVector-VecOp-ExtractElement sequence on LE, but the
peephole itself is not related to endianness, so BE may also benefit
from this.

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D97658

2021-03-10 15:21:32 +08:00

3 Commits