b74c666186
Culling out use of unions for converting FP to bits and vice versa.
...
llvm-svn: 22838
2005-08-17 19:34:49 +00:00
c6aa80668e
add a beta option for turning on dag->dag isel
...
llvm-svn: 22837
2005-08-17 19:33:30 +00:00
43ff01e2e6
initial hack at a dag->dag instruction selector. This is obviously woefully
...
incomplete, but it is a start. It handles basic argument/retval stuff, immediates,
add and sub.
llvm-svn: 22836
2005-08-17 19:33:03 +00:00
f61cce952b
add prototype, remove dead proto
...
llvm-svn: 22835
2005-08-17 19:32:03 +00:00
33900811ee
Fix some bugs in the alpha backend, some of which I introduced yesterday,
...
and some that were preexisting. All alpha regtests pass now.
llvm-svn: 22829
2005-08-17 17:08:24 +00:00
63f774ec6e
Fix a few small typos I noticed when converting this over to the DAG->DAG
...
selector. Also, there is no difference between addSImm and addImm, so just
use addImm, folding some branches.
llvm-svn: 22819
2005-08-17 01:25:14 +00:00
9828f26cf1
Removed UINT_TO_FP and SINT_TO_FP from ISel outright.
...
llvm-svn: 22818
2005-08-17 01:14:38 +00:00
73370ba5fd
thinko. Should fix s4addl.ll regression
...
llvm-svn: 22817
2005-08-17 00:47:24 +00:00
5909c8b10a
Remove ISel code generation for UINT_TO_FP and SINT_TO_FP. Now asserts if
...
marked as legal.
llvm-svn: 22816
2005-08-17 00:41:40 +00:00
6267b2c97c
Make UINT_TO_FP and SINT_TO_FP use generic expansion.
...
llvm-svn: 22815
2005-08-17 00:40:22 +00:00
784c8068a7
Implement a couple improvements:
...
Remove dead code in ISD::Constant handling
Add support for add long, imm16
We now codegen 'long long foo(long long a) { return ++a; }'
as:
addic r4, r4, 1
addze r3, r3
blr
instead of:
li r2, 1
li r5, 0
addc r2, r4, r2
adde r3, r3, r5
blr
llvm-svn: 22811
2005-08-17 00:20:08 +00:00
79f5ebc7b9
updates for changes in nodes
...
llvm-svn: 22808
2005-08-16 21:58:15 +00:00
7c76278242
update the backends to work with the new CopyFromReg/CopyToReg/ImplicitDef nodes
...
llvm-svn: 22807
2005-08-16 21:56:37 +00:00
371e49515d
Implement BR_CC and BRTWOWAY_CC. This allows the removal of a rather nasty
...
fixme from the PowerPC backend. Emit slightly better code for legalizing
select_cc.
llvm-svn: 22805
2005-08-16 19:49:35 +00:00
f22556d3ad
Pull the LLVM -> DAG lowering code out of the pattern selector so that it
...
can be shared with the DAG->DAG selector.
llvm-svn: 22799
2005-08-16 17:14:42 +00:00
73785d2ef2
Turn loop strength reduction on by default.
...
Only run createLowerConstantExpressionsPass for the simple isel. The DAG
isel has no need for it.
llvm-svn: 22794
2005-08-15 23:47:04 +00:00
24b84072ea
Broke 80 column rule.
...
llvm-svn: 22792
2005-08-15 17:35:26 +00:00
42623a9539
Changed code gen for int to f32 to use rounding. This makes FP results
...
consistent with gcc.
llvm-svn: 22791
2005-08-15 17:14:19 +00:00
b65b1568ae
isIntImmediate is a good Idea. Add a flavor that checks bounds while it is at it
...
llvm-svn: 22790
2005-08-15 14:31:37 +00:00
d5e739dcc2
Fix last night's PPC32 regressions by
...
1. Not selecting the false value of a select_cc in the false arm, which
isn't legal for nested selects.
2. Actually returning the node we created and Legalized in the FP_TO_UINT
Expander.
llvm-svn: 22789
2005-08-14 18:38:32 +00:00
e5394d453d
Fix last night's X86 regressions by putting code for SSE in the if(SSE)
...
block. nur.
llvm-svn: 22788
2005-08-14 18:37:02 +00:00
4d959f6627
Fix FP_TO_UINT with Scalar SSE2 now that the legalizer can handle it. We
...
now generate the relatively good code sequences:
unsigned short foo(float a) { return a; }
_foo:
movss 4(%esp), %xmm0
cvttss2si %xmm0, %eax
movzwl %ax, %eax
ret
and
unsigned bar(float a) { return a; }
_bar:
movss .CPI_bar_0, %xmm0
movss 4(%esp), %xmm1
movapd %xmm1, %xmm2
subss %xmm0, %xmm2
cvttss2si %xmm2, %eax
xorl $-2147483648, %eax
cvttss2si %xmm1, %ecx
ucomiss %xmm0, %xmm1
cmovb %ecx, %eax
ret
llvm-svn: 22786
2005-08-14 04:36:51 +00:00
83f6b98c42
Make FP_TO_UINT Illegal. This allows us to generate significantly better
...
codegen for FP_TO_UINT by using the legalizer's SELECT variant.
Implement a codegen improvement for SELECT_CC, selecting the false node in
the MBB that feeds the phi node. This allows us to codegen:
void foo(int *a, int b, int c) { int d = (a < b) ? 5 : 9; *a = d; }
as:
_foo:
li r2, 5
cmpw cr0, r4, r3
bgt .LBB_foo_2 ; entry
.LBB_foo_1: ; entry
li r2, 9
.LBB_foo_2: ; entry
stw r2, 0(r3)
blr
insted of:
_foo:
li r2, 5
li r5, 9
cmpw cr0, r4, r3
bgt .LBB_foo_2 ; entry
.LBB_foo_1: ; entry
or r2, r5, r5
.LBB_foo_2: ; entry
stw r2, 0(r3)
blr
llvm-svn: 22784
2005-08-14 01:17:16 +00:00
a22bf778c9
Remove support for 64b PPC, it's been broken for a long time. It'll be
...
back once a DAG->DAG ISel exists.
llvm-svn: 22778
2005-08-13 05:59:16 +00:00
35960708b7
Fix for 2005-08-12-rlwimi-crash.ll. Make allowance for masks being shifted to
...
zero.
llvm-svn: 22773
2005-08-12 23:52:46 +00:00
a568700618
1. This changes handles the cases of (~x)&y and x&(~y) yielding ANDC, and
...
(~x)|y and x|(~y) yielding ORC.
llvm-svn: 22771
2005-08-12 23:38:02 +00:00
8c6701be6e
match gcc's use of tabs, makes diffs easier
...
llvm-svn: 22764
2005-08-12 16:14:08 +00:00
ca94102d3e
.section cleanup, patch from Nicholas Riley
...
llvm-svn: 22763
2005-08-12 16:13:43 +00:00
a50f770a2c
1. Added the function isOpcWithIntImmediate to simplify testing of operand with
...
specified opcode and an integer constant right operand.
2. Modified ISD::SHL, ISD::SRL, ISD::SRA to use rlwinm when applied after a mask.
llvm-svn: 22761
2005-08-11 21:59:23 +00:00
d418d752f4
Tidied up the use of dyn_cast<ConstantSDNode> by using isIntImmediate more.
...
Patch by Jim Laskey.
llvm-svn: 22760
2005-08-11 17:56:50 +00:00
c5e1312baa
Use a more efficient method of creating integer and float virtual registers
...
(avoids an extra level of indirection in MakeReg).
defined MakeIntReg using RegMap->createVirtualRegister(PPC32::GPRCRegisterClass)
defined MakeFPReg using RegMap->createVirtualRegister(PPC32::FPRCRegisterClass)
s/MakeReg(MVT::i32)/MakeIntReg/
s/MakeReg(MVT::f64)/MakeFPReg/
Patch by Jim Laskey!
llvm-svn: 22759
2005-08-11 17:15:31 +00:00
5646b181e8
Make SELECT illegal on PPC32, switch to using SELECT_CC, which more closely
...
reflects what the hardware is capable of. This significantly simplifies
the CC handling logic throughout the ISel.
llvm-svn: 22756
2005-08-10 20:52:09 +00:00
3428b95634
Changes for PPC32ISelPattern.cpp
...
1. Clean up how SelectIntImmediateExpr handles use counts.
2. "Subtract from" was not clearing hi 16 bits.
Patch by Jim Laskey
llvm-svn: 22754
2005-08-10 18:11:33 +00:00
aeedcc7fc2
Changed the XOR case to use the isOprNot predicate.
...
Patch by Jim Laskey!
llvm-svn: 22750
2005-08-10 16:35:46 +00:00
67d0753773
1. Refactored handling of integer immediate values for add, or, xor and sub.
...
New routine: ISel::SelectIntImmediateExpr
2. Now checking use counts of large constants. If use count is > 2 then drop
thru so that the constant gets loaded into a register.
Source:
int %test1(int %a) {
entry:
%tmp.1 = add int %a, 123456789 ; <int> [#uses=1]
%tmp.2 = or int %tmp.1, 123456789 ; <int> [#uses=1]
%tmp.3 = xor int %tmp.2, 123456789 ; <int> [#uses=1]
%tmp.4 = sub int %tmp.3, -123456789 ; <int> [#uses=1]
ret int %tmp.4
}
Did Emit:
.machine ppc970
.text
.align 2
.globl _test1
_test1:
.LBB_test1_0: ; entry
addi r2, r3, -13035
addis r2, r2, 1884
ori r2, r2, 52501
oris r2, r2, 1883
xori r2, r2, 52501
xoris r2, r2, 1883
addi r2, r2, 52501
addis r3, r2, 1883
blr
Now Emits:
.machine ppc970
.text
.align 2
.globl _test1
_test1:
.LBB_test1_0: ; entry
lis r2, 1883
ori r2, r2, 52501
add r3, r3, r2
or r3, r3, r2
xor r3, r3, r2
add r3, r3, r2
blr
Patch by Jim Laskey!
llvm-svn: 22749
2005-08-10 16:34:52 +00:00
1c2f9fdf71
sorry!! this is temporary; for some reason the nasty constmul code seems to
...
be an infinite loop when using g++-4.0.1*, this kills the ia64 nightly
tester. A proper fix shall be forthcoming!!! thanks for not killing me. :)
llvm-svn: 22748
2005-08-10 12:38:57 +00:00
5f56d71cd7
Fix a bug compiling: select (i32 < i32), f32, f32
...
llvm-svn: 22747
2005-08-10 03:40:09 +00:00
54ee86aca7
add a optimization note
...
llvm-svn: 22732
2005-08-09 22:30:57 +00:00
6ec7745e80
Update the targets to the new SETCC/CondCodeSDNode interfaces.
...
llvm-svn: 22729
2005-08-09 20:21:10 +00:00
2035c4f7f8
Minor cleanup patch, no functionality changes. Written by Jim Laskey.
...
llvm-svn: 22727
2005-08-09 18:29:55 +00:00
4c62c647c2
Fix CodeGen/Generic/div-neg-power-2.ll, a regression from last night.
...
llvm-svn: 22726
2005-08-09 18:08:41 +00:00
c92787e1f5
Factor out some common code, and be smarter about when to emit load hi/lo
...
code sequences.
llvm-svn: 22719
2005-08-08 22:22:56 +00:00
64068eb7da
Remove getImmediateForOpcode, which is now dead.
...
Patch by Jim Laskey.
llvm-svn: 22716
2005-08-08 21:34:13 +00:00
25388199a2
Add new immediate handling support for mul/div.
...
Patch by Jim Laskey!
llvm-svn: 22715
2005-08-08 21:33:23 +00:00
8e9dc31928
Add support for OR/XOR/SUB immediates that are handled with the new immediate
...
way. This allows ORI/ORIS pairs, for example.
llvm-svn: 22714
2005-08-08 21:30:29 +00:00
fd0fe76ba6
Modify the ISD::AND opcode case to use new immediate constant predicates.
...
Includes wider support for rotate and mask cases.
Patch by Jim Laskey.
I've requested that Jim add new regression tests the newly handled cases.
llvm-svn: 22712
2005-08-08 21:24:57 +00:00
81e0e3e933
Modify the ISD::ADD opcode case to use new immediate constant predicates.
...
Includes support for 32-bit constants using addi/addis.
Patch by Jim Laskey.
llvm-svn: 22711
2005-08-08 21:21:03 +00:00
4c54dae243
Modify existing support functions to use new immediate constant predicates.
...
Patch by Jim Laskey
llvm-svn: 22710
2005-08-08 21:12:35 +00:00
3cc070cc36
Add support predicates for future immediate constant changes.
...
Patch by Jim Laskey
llvm-svn: 22709
2005-08-08 21:10:27 +00:00
f2267ed5c5
Move IsRunOfOnes to a more logical place and rename to a proper predicate form
...
(lowercase isXXX).
Patch by Jim Laskey.
llvm-svn: 22708
2005-08-08 21:08:09 +00:00
9a838678b0
Fix JIT encoding of ppc mfocrf instruction; the operands were reversed
...
llvm-svn: 22707
2005-08-08 20:04:52 +00:00
983a415b6a
Consolidate the GPOpt stuff to all use the Subtarget, instead of still
...
depending on the command line option. Now the command line option just
sets the subtarget as appropriate. G5 opts will now default to on on
G5-enabled nightly testers among other machines.
llvm-svn: 22688
2005-08-05 22:05:03 +00:00
158acab986
adjust to change in getSubtarget() api
...
llvm-svn: 22687
2005-08-05 21:54:27 +00:00
431b8d80bd
Enable gp optimizations by default when available, even when a target triple
...
is available, since the target triple doesn't specify whether to use gpopts
or not.
llvm-svn: 22685
2005-08-05 21:25:13 +00:00
11fc319b5d
add a note
...
llvm-svn: 22681
2005-08-05 19:18:32 +00:00
8c636bf8b2
don't crash when running the PPC backend on non-ppc hosts without specifying
...
a subtarget.
llvm-svn: 22677
2005-08-05 16:17:22 +00:00
e3cbe1027d
Hack to naturally align doubles in the constant pool. Remove this once we
...
know what The Right Thing To Do is.
llvm-svn: 22660
2005-08-04 21:04:09 +00:00
295ea90634
Use the new subtarget support to automatically choose the correct ABI
...
and asm printer for PowerPC if one is not specified.
llvm-svn: 22659
2005-08-04 20:49:48 +00:00
5adb830b30
No, IDEFs shouldn't be JITed
...
llvm-svn: 22648
2005-08-04 15:32:36 +00:00
3bcfcd9474
Add Subtarget support to PowerPC. Next up, using it.
...
llvm-svn: 22644
2005-08-04 07:12:09 +00:00
8d394eb703
Scalar SSE: load +0.0 -> xorps/xorpd
...
Scalar SSE: a < b ? c : 0.0 -> cmpss, andps
Scalar SSE: float -> i16 needs to be promoted
llvm-svn: 22637
2005-08-03 23:26:28 +00:00
3a18a39587
Alpha ABI specifies stack is always 16 byte alligned, and gcc does it, so I will too
...
llvm-svn: 22634
2005-08-03 22:33:21 +00:00
fce3285891
Fix grammar: apostrophe-s ('s) is possessive, not plural; also iff vs. if.
...
llvm-svn: 22619
2005-08-03 17:29:52 +00:00
8dc82b7909
minor capitalization thing, patch by Jim Laskey
...
llvm-svn: 22617
2005-08-03 16:52:22 +00:00
80e038c148
one more hunk that got dropped
...
llvm-svn: 22596
2005-08-02 19:35:29 +00:00
989d8bbda9
This hunk accidentally got dropped. Patch by Jim Laskey
...
llvm-svn: 22595
2005-08-02 19:30:55 +00:00
6667bdbaca
Update to use the new MathExtras.h support for log2 computation.
...
Patch contributed by Jim Laskey!
llvm-svn: 22594
2005-08-02 19:26:06 +00:00
c98d48fabe
add a pass name to make debugging dumps nicer
...
llvm-svn: 22588
2005-08-02 19:07:49 +00:00
ae97fff758
update function codes to reflect /su flags that have been added since this was written
...
llvm-svn: 22571
2005-08-01 20:06:01 +00:00
33bbf15147
use llabs not abs
...
llvm-svn: 22569
2005-08-01 17:47:28 +00:00
546fd5944e
Keep tabs and trailing spaces out.
...
llvm-svn: 22565
2005-07-30 18:33:25 +00:00
4913457573
fix a typeo
...
llvm-svn: 22561
2005-07-30 00:43:00 +00:00
aeef51b6b7
Change the fp to integer code to not perform 2-byte stores followed by
...
1 byte loads and other operations. This is bad for store-forwarding on
common CPUs. We now do this:
fnstcw WORD PTR [%ESP]
mov %AX, WORD PTR [%ESP]
instead of:
fnstcw WORD PTR [%ESP]
mov %AL, BYTE PTR [%ESP + 1]
llvm-svn: 22559
2005-07-30 00:17:52 +00:00
4738d1b5cd
Use a custom expander for all FP to int conversions, as the X86 only has
...
FP-to-int-in-memory: this exposes the load from the stored slot to the
selection dag, allowing it to be folded into other operaions.
llvm-svn: 22556
2005-07-30 00:05:54 +00:00
2f9c52e194
turn off GOT on archs that didn't use it (not that it appeard to harm them much with it on)
...
llvm-svn: 22553
2005-07-29 23:32:02 +00:00
bc85c32c73
Implement a FIXME: move a bunch of cruft for handling FP_TO_*INT operations
...
that the X86 does not support to the legalizer. This allows it to be better
optimized, etc, and will help with SSE support.
llvm-svn: 22551
2005-07-29 01:00:29 +00:00
6dc60e859b
Don't forget to diddle with the control word when performing an FISTP64.
...
llvm-svn: 22550
2005-07-29 00:54:34 +00:00
67756e2e22
Use a custom expander to compile this:
...
long %test4(double %X) {
%tmp.1 = cast double %X to long ; <long> [#uses=1]
ret long %tmp.1
}
to this:
_test4:
sub %ESP, 12
fld QWORD PTR [%ESP + 16]
fistp QWORD PTR [%ESP]
mov %EDX, DWORD PTR [%ESP + 4]
mov %EAX, DWORD PTR [%ESP]
add %ESP, 12
ret
instead of this:
_test4:
sub %ESP, 28
fld QWORD PTR [%ESP + 32]
fstp QWORD PTR [%ESP]
call ___fixdfdi
add %ESP, 28
ret
llvm-svn: 22549
2005-07-29 00:40:01 +00:00
1ec48e8683
support bsr, and more .td simplification
...
llvm-svn: 22543
2005-07-28 18:14:47 +00:00
b57b0baac0
get lazy JITing working. Some of shootout runs now
...
llvm-svn: 22538
2005-07-28 12:45:20 +00:00
a8195603e4
Eliminate an extra copy from R1 that Nate noticed on function calls that
...
have to write arguments to the stack
llvm-svn: 22536
2005-07-28 05:23:43 +00:00
7c38bd14ef
Specify the correct number of operands
...
llvm-svn: 22535
2005-07-28 04:42:11 +00:00
c5b6bd9a8e
Fold constant adds into loads and stores to frame indices.
...
For the following code:
double %ext(int %A.0__, long %A.1__) {
%A_addr = alloca %typedef.DComplex ; <%typedef.DComplex*> [#uses=2]
%tmp.1 = cast %typedef.DComplex* %A_addr to int* ; <int*> [#uses=1]
store int %A.0__, int* %tmp.1
%tmp.2 = getelementptr %typedef.DComplex* %A_addr, int 0, uint 1 ; <double*> [#uses=2]
%tmp.3 = cast double* %tmp.2 to long* ; <long*> [#uses=1]
store long %A.1__, long* %tmp.3
%tmp.5 = load double* %tmp.2 ; <double> [#uses=1]
ret double %tmp.5
}
We now generate:
_ext:
.LBB_ext_0: ;
stw r3, -12(r1)
stw r4, -8(r1)
stw r5, -4(r1)
lfd f1, -8(r1)
blr
Instead of:
_ext:
.LBB_ext_0: ;
stw r3, -12(r1)
addi r2, r1, -12
stw r4, 4(r2)
stw r5, 8(r2)
lfd f1, 4(r2)
blr
This also fires hundreds of times on MultiSource.
llvm-svn: 22533
2005-07-28 03:02:05 +00:00
594a3ba40e
Fix some comments
...
llvm-svn: 22530
2005-07-27 23:11:27 +00:00
5f4ef3c5a8
Eliminate all remaining tabs and trailing spaces.
...
llvm-svn: 22523
2005-07-27 06:12:32 +00:00
8e2411334c
Implement the optimization for the Red Zone on Darwin. This removes the
...
unnecessary SP manipulation in leaf routines that don't need it.
llvm-svn: 22522
2005-07-27 06:06:29 +00:00
a5ec193118
fix some warnings when compiled with 32-bit hosts
...
llvm-svn: 22521
2005-07-27 05:58:01 +00:00
33a030e36c
Eliminate tabs and trailing spaces.
...
llvm-svn: 22520
2005-07-27 05:53:44 +00:00
1defb7fe80
add a note about the red zone
...
llvm-svn: 22518
2005-07-26 19:07:51 +00:00
06721f50b0
Wrap some long lines, fix emission of weak global variables
...
llvm-svn: 22517
2005-07-26 19:03:27 +00:00
7b8733571e
Update the PPC readme
...
llvm-svn: 22516
2005-07-26 18:59:06 +00:00
b9ce12b4bb
Fix an optimization put in for accessing static globals. This obviates
...
the need to build PIC.
llvm-svn: 22512
2005-07-25 21:15:28 +00:00
54b0b62ff0
fix compile error
...
llvm-svn: 22508
2005-07-23 07:46:48 +00:00
12f5d12b21
PowerPC no-pic code is not quite ready for prime-time
...
llvm-svn: 22507
2005-07-22 22:58:34 +00:00
7dec1f3aa6
Handle more imm forms, and load small negative i32 constants without hitting memory (should do the same for arbitrary zero extended small negative constants)
...
llvm-svn: 22505
2005-07-22 22:24:01 +00:00
c32843ed2b
finally found the gcc defined constants
...
llvm-svn: 22502
2005-07-22 21:00:30 +00:00
55d045190e
Alpha JIT (beta)
...
llvm-svn: 22500
2005-07-22 20:52:16 +00:00
02daecc7c6
simpilfy instruction encoding (and make the lines way shorter, aka Misha happification)
...
llvm-svn: 22499
2005-07-22 20:50:29 +00:00
111e5e6490
update interface
...
llvm-svn: 22498
2005-07-22 20:49:37 +00:00
a9443f29b0
Support building non-PIC
...
Remove the LoadHiAddr pseudo-instruction.
Optimization of stores to and loads from statics.
Force JIT to use new non-PIC codepaths.
llvm-svn: 22494
2005-07-21 20:44:43 +00:00
53208ecf34
revert to using 4-byte alignment for doubles, as specified by the ABI
...
llvm-svn: 22493
2005-07-21 19:17:18 +00:00
15527113ab
Support assembling fsqrt on darwin. This will be implemented better when
...
PowerPC gets subtarget support up.
llvm-svn: 22489
2005-07-21 01:25:49 +00:00
8465fe8b4b
Generate mfocrf when targeting g5. Generate fsqrt/fsqrts when targetin g5.
...
8-byte align doubles.
llvm-svn: 22486
2005-07-20 22:42:00 +00:00
0851f1aaa1
Integrate SelectFPExpr into SelectExpr. This gets PPC32 closer to being
...
automatically generated from a target description.
llvm-svn: 22470
2005-07-19 16:51:05 +00:00
d37d854cb2
For: memory operations -> stores
...
This is the first incremental patch to implement this feature. It adds no
functionality to LLVM but setup up the information needed from targets in
order to implement the optimization correctly. Each target needs to specify
the maximum number of store operations for conversion of the llvm.memset,
llvm.memcpy, and llvm.memmove intrinsics into a sequence of store operations.
The limit needs to be chosen at the threshold of performance for such an
optimization (generally smallish). The target also needs to specify whether
the target can support unaligned stores for multi-byte store operations.
This helps ensure the optimization doesn't generate code that will trap on
an alignment errors.
More patches to follow.
llvm-svn: 22468
2005-07-19 04:52:44 +00:00
7e74c834c1
Teach the legalizer how to promote SINT_TO_FP to a wider SINT_TO_FP that
...
the target natively supports. This eliminates some special-case code from
the x86 backend and generates better code as well.
For an i8 to f64 conversion, before & after:
_x87 before:
subl $2, %esp
movb 6(%esp), %al
movsbw %al, %ax
movw %ax, (%esp)
filds (%esp)
addl $2, %esp
ret
_x87 after:
subl $2, %esp
movsbw 6(%esp), %ax
movw %ax, (%esp)
filds (%esp)
addl $2, %esp
ret
_sse before:
subl $12, %esp
movb 16(%esp), %al
movsbl %al, %eax
cvtsi2sd %eax, %xmm0
addl $12, %esp
ret
_sse after:
subl $12, %esp
movsbl 16(%esp), %eax
cvtsi2sd %eax, %xmm0
addl $12, %esp
ret
llvm-svn: 22452
2005-07-16 02:02:34 +00:00
8293d0e232
Teach the register allocator that movaps is also a move instruction
...
llvm-svn: 22451
2005-07-16 02:00:20 +00:00
57b9ed522d
A couple more darwinisms
...
llvm-svn: 22450
2005-07-16 01:59:47 +00:00
507a27592f
Remove all knowledge of UINT_TO_FP from the X86 backend, relying on the
...
legalizer to eliminate them. With this comes the expected code quality
improvements, such as, for this:
double foo(unsigned short X) { return X; }
we now generate this:
_foo:
subl $4, %esp
movzwl 8(%esp), %eax
movl %eax, (%esp)
fildl (%esp)
addl $4, %esp
ret
instead of this:
_foo:
subl $4, %esp
movw 8(%esp), %ax
movzwl %ax, %eax ;; Load not folded into this.
movl %eax, (%esp)
fildl (%esp)
addl $4, %esp
ret
-Chris
llvm-svn: 22449
2005-07-16 00:28:20 +00:00
a0b5e035ea
Get closer to fully working scalar FP in SSE regs. This gets singlesource
...
working, and Olden/power.
llvm-svn: 22441
2005-07-15 00:38:55 +00:00
0f38dc4970
Add support for printing the sse scalar comparison instruction mnemonics.
...
llvm-svn: 22440
2005-07-14 22:52:25 +00:00
3870f9d31a
Fixed PR#596:
...
Add parenthesis around the value being negated; that way, if the value
begins with a minus sign (e.g. negative integer), we won't generate a
C predecrement operator by mistake.
llvm-svn: 22437
2005-07-14 19:41:16 +00:00
8dd96ec769
Check in the last of the darwin-specific code necessary to get shootout
...
working before modifying the asm printer to use the subtarget info.
llvm-svn: 22408
2005-07-12 18:34:58 +00:00
5fc86e8314
Remove some code that moved to the generic asm printer a long time ago.
...
llvm-svn: 22407
2005-07-12 18:34:15 +00:00
20b534a4fd
Fix povray and minor cleanups
...
llvm-svn: 22397
2005-07-12 04:20:52 +00:00
ddc8b78cda
I don't know how this ever compiled with gcc, but VC++ correctly rejects it.
...
llvm-svn: 22394
2005-07-12 02:59:38 +00:00
df8946dede
Clean up the TargetSubtarget class a bit, removing an unnecessary argument
...
to the constructor.
llvm-svn: 22392
2005-07-12 02:41:19 +00:00
351817b1f9
Minor changes to improve comments and fix the build on _WIN32 systems.
...
llvm-svn: 22391
2005-07-12 02:36:10 +00:00
f873f4d504
Add a note
...
llvm-svn: 22390
2005-07-12 02:35:36 +00:00
f26625e1de
Implement Subtarget support
...
Implement the X86 Subtarget.
This consolidates the checks for target triple, and setting options based
on target triple into one place. This allows us to convert the asm printer
and isel over from being littered with "forDarwin", "forCygwin", etc. into
just having the appropriate flags for each subtarget feature controlling
the code for that feature.
This patch also implements indirect external and weak references in the
X86 pattern isel, for darwin. Next up is to convert over the asm printers
to use this new interface.
llvm-svn: 22389
2005-07-12 01:41:54 +00:00
83b492b83c
Commit some pending darwin changes before subtarget support.
...
llvm-svn: 22388
2005-07-12 01:37:28 +00:00
fd564c6bc9
fix a warning
...
llvm-svn: 22385
2005-07-11 22:46:18 +00:00
9bdb1c3818
Output .size directives to tell the assembler the size of each function.
...
llvm-svn: 22381
2005-07-11 06:29:14 +00:00
0d2f043c41
Fix crazy indentation
...
llvm-svn: 22380
2005-07-11 06:25:47 +00:00
d831209c34
Refactor things a bit to allow the ELF code emitter to run the X86 machine code emitter
...
after itself.
llvm-svn: 22376
2005-07-11 05:17:48 +00:00
c3e38f7943
Remove prototype for non-existant function
...
llvm-svn: 22372
2005-07-11 04:20:55 +00:00
53676dfd33
Change *EXTLOAD to use an VTSDNode operand instead of being an MVTSDNode.
...
This is the last MVTSDNode.
This allows us to eliminate a bunch of special case code for handling
MVTSDNodes.
Also, remove some uses of dyn_cast that should really be cast (which is
cheaper in a release build).
llvm-svn: 22368
2005-07-10 01:56:13 +00:00
36db1ed06f
Change TRUNCSTORE to use a VTSDNode operand instead of being an MVTSTDNode
...
llvm-svn: 22366
2005-07-10 00:29:18 +00:00
b62a4c8da6
Add support for assembling .s files on mac os x for intel
...
Add support for running bugpoint on mac os x for intel
llvm-svn: 22351
2005-07-08 00:23:26 +00:00
8d40dcbd18
clean up prolouge and epilouge
...
llvm-svn: 22346
2005-07-07 19:52:58 +00:00
2e81f65eb8
Restore some code that was accidentally removed by Nate's patch yesterday.
...
This fixes the regressions from last night.
llvm-svn: 22344
2005-07-07 17:12:53 +00:00
fcd2f76cb6
Fix a typo in my checkin today that caused regressions. Oops!
...
llvm-svn: 22341
2005-07-07 06:32:01 +00:00
8a0933608a
First round of support for doing scalar FP using the SSE2 ISA extension and
...
XMM registers. There are many known deficiencies and fixmes, which will be
addressed ASAP. The major benefit of this work is that it will allow the
LLVM register allocator to allocate FP registers across basic blocks.
The x86 backend will still default to x87 style FP. To enable this work,
you must pass -enable-sse-scalar-fp and either -sse2 or -sse3 to llc.
An example before and after would be for:
double foo(double *P) { double Sum = 0; int i; for (i = 0; i < 1000; ++i)
Sum += P[i]; return Sum; }
The inner loop looks like the following:
x87:
.LBB_foo_1: # no_exit
fldl (%esp)
faddl (%eax,%ecx,8)
fstpl (%esp)
incl %ecx
cmpl $1000, %ecx
#FP_REG_KILL
jne .LBB_foo_1 # no_exit
SSE2:
addsd (%eax,%ecx,8), %xmm0
incl %ecx
cmpl $1000, %ecx
#FP_REG_KILL
jne .LBB_foo_1 # no_exit
llvm-svn: 22340
2005-07-06 18:59:04 +00:00
a7220851c0
Make several cleanups to Andrews varargs change:
...
1. Pass Value*'s into lowering methods so that the proper pointers can be
added to load/stores from the valist
2. Intrinsics that return void should only return a token chain, not a token
chain/retval pair.
3. Rename LowerVAArgNext -> LowerVAArg, because VANext is long gone.
4. Now that we have Value*'s available in the lowering methods, pass them
into any load/stores from the valist that are emitted
llvm-svn: 22339
2005-07-05 19:58:54 +00:00
91ae129b90
Fit to 80 columns
...
llvm-svn: 22336
2005-07-05 17:50:16 +00:00
1239d2d7ff
Fix PowerPC varargs
...
llvm-svn: 22335
2005-07-05 17:48:31 +00:00
26fa89e0a7
check the correct VT
...
llvm-svn: 22332
2005-07-04 20:07:21 +00:00
da852d51df
fix loading address of fp symbols
...
llvm-svn: 22331
2005-07-03 20:06:13 +00:00
9f6ce0ebb3
Percolate the call up to the right superclass
...
llvm-svn: 22330
2005-07-03 17:34:39 +00:00
9a1dc72729
The statistic needs to be in the correct namespace.
...
llvm-svn: 22327
2005-07-01 23:56:38 +00:00
d313b92b66
Varargs is apparently currently broken on PPC. This hacks it so that it
...
is at least overloading the right virtual methods. The implementations
are currently wrong though. This fixes Ptrdist/bc, but not other programs
(e.g. siod).
llvm-svn: 22326
2005-07-01 23:11:56 +00:00
b97404687a
Refactor X86AsmPrinter.cpp into multiple files. Patch contributed
...
by Aaron Gray, cleaned up by me.
llvm-svn: 22324
2005-07-01 22:44:09 +00:00
21da9b669e
simplify call code, remove pseudo ops for div and rem, track more loads and stores
...
llvm-svn: 22323
2005-07-01 19:14:02 +00:00
dd55b1566b
simplify call code, remove pseudo ops for div and rem, track more loads and stores
...
llvm-svn: 22322
2005-07-01 19:12:13 +00:00
e8ab64b5c3
remove some debugging code
...
llvm-svn: 22321
2005-07-01 06:40:58 +00:00
718387e491
Make the x86 asm printer darwin-aware. This mostly entails doing the same
...
thing as cygwin most of the time, and printing our alignments in log2
rather than number of bytes.
llvm-svn: 22316
2005-06-30 00:53:20 +00:00
2edc1881ac
restore old srcValueNode behavior and try to to work around it
...
llvm-svn: 22315
2005-06-29 18:54:02 +00:00
8192568fbc
tracking the instructions causing loads and stores provides more information than just the pointer being loaded or stored
...
llvm-svn: 22311
2005-06-29 15:57:19 +00:00
4401049f05
thinko
...
llvm-svn: 22309
2005-06-29 13:35:05 +00:00
d0a2f0f95a
unify SelectExpr and SelectFP
...
llvm-svn: 22308
2005-06-29 12:49:51 +00:00
Jim Laskey