llvm-project

Commit Graph

Author	SHA1	Message	Date
Simon Moll	b955c7e630	[VE] VE Vector Predicated SDNode, vector add isel and tests VE Vector Predicated (VVP) SDNodes form an intermediate layer between VE vector instructions and the initial SDNodes. We introduce 'vvp_add' with isel and tests as the first of these VVP nodes. VVP nodes have a mask and explicit vector length operand, which we will make proper use of later. Reviewed By: kaz7 Differential Revision: https://reviews.llvm.org/D91802	2020-11-23 17:17:07 +01:00
Simon Moll	ffe6c97f6b	[VE] VEC_BROADCAST, lowering and isel This defines the vec_broadcast SDNode along with lowering and isel code. We also remove unused type mappings for the vector register classes (all vector MVTs that are not used in the ISA go). We will implement support for short vectors later by intercepting nodes with illegal vector EVTs before LLVM has had a chance to widen them. Reviewed By: kaz7 Differential Revision: https://reviews.llvm.org/D91646	2020-11-19 09:44:56 +01:00

Author

SHA1

Message

Date

Simon Moll

b955c7e630

[VE] VE Vector Predicated SDNode, vector add isel and tests

VE Vector Predicated (VVP) SDNodes form an intermediate layer between VE
vector instructions and the initial SDNodes.

We introduce 'vvp_add' with isel and tests as the first of these VVP
nodes. VVP nodes have a mask and explicit vector length operand, which
we will make proper use of later.

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D91802

2020-11-23 17:17:07 +01:00

Simon Moll

ffe6c97f6b

[VE] VEC_BROADCAST, lowering and isel

This defines the vec_broadcast SDNode along with lowering and isel code.
We also remove unused type mappings for the vector register classes (all vector MVTs that are not used in the ISA go).

We will implement support for short vectors later by intercepting nodes with illegal vector EVTs before LLVM has had a chance to widen them.

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D91646

2020-11-19 09:44:56 +01:00

2 Commits