30a49e93e3
New approach to r136737: insert the necessary fences for atomic ops in platform-independent code, since a bunch of platforms (ARM, Mips, PPC, Alpha are the relevant targets here) need to do essentially the same thing.
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I think this completes the basic CodeGen for atomicrmw and cmpxchg.
llvm-svn: 136813
2011-08-03 21:06:02 +00:00
1142444565
Rename TargetAsmParser to MCTargetAsmParser and TargetAsmLexer to MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser.
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llvm-svn: 136027
2011-07-26 00:24:13 +00:00
aaba17e89b
Set PPCII::MO_DARWIN_STUB only on MacOSX < 10.5.
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llvm-svn: 135866
2011-07-24 08:22:56 +00:00
229907cd11
land David Blaikie's patch to de-constify Type, with a few tweaks.
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llvm-svn: 135375
2011-07-18 04:54:35 +00:00
f03fa189ca
Add an intrinsic and codegen support for fused multiply-accumulate. The intent
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is to use this for architectures that have a native FMA instruction.
llvm-svn: 134742
2011-07-08 21:39:21 +00:00
cc5e53383e
Remove accidentaly left node from previous iteration of the patch.
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Noticed by Benjamin Kramer!
llvm-svn: 134376
2011-07-04 15:42:45 +00:00
4394e68c24
Implement ISD::VAARG lowering on PPC32.
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llvm-svn: 134005
2011-06-28 15:30:42 +00:00
d041962c20
Fix a few places where 32bit instructions/registerset were used on PPC64.
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llvm-svn: 133260
2011-06-17 15:21:10 +00:00
164b1d753a
PR10136: fix PPCTargetLowering::LowerCall_SVR4 so that a necessary CopyToReg doesn't appear to be dead.
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Roman, since you're writing tests for other PPC-SVR4 vararg-related stuff, would you mind writing a test for this?
llvm-svn: 133018
2011-06-14 22:16:20 +00:00
0713a9d8fc
Add a parameter to CCState so that it can access the MachineFunction.
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No functional change.
Part of PR6965
llvm-svn: 132763
2011-06-08 23:55:35 +00:00
a4a59aebd9
Fix wrong usages of CTR/MCTR where CTR8/MCTR8 was meant.
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- Check for MTCTR8 in addition to MTCTR when looking up a hazard.
- When lowering an indirect call use CTR8 when targeting 64bit.
- Introduce BCTR8 that uses CTR8 and use it on 64bit when expanding ISD::BRIND.
The last change fixes PR8487. With those changes, we are able to compile a
running "ls" and "sh" on FreeBSD/PowerPC64.
llvm-svn: 132552
2011-06-03 15:47:49 +00:00
de9399bf76
Have LowerOperandForConstraint handle multiple character constraints.
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Part of rdar://9119939
llvm-svn: 132510
2011-06-02 23:16:42 +00:00
41025dc95b
Make CodeGen/PowerPC/2007-09-11-RegCoalescerAssert.ll pass with the verifier.
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llvm-svn: 131627
2011-05-19 03:11:06 +00:00
2518f8376d
Make the logic for determining function alignment more explicit. No functionality change.
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llvm-svn: 131012
2011-05-06 20:34:06 +00:00
cd01ed5bd6
ADT/Triple: Renambe isOSX... methods to isMacOSX for consistency with the OS
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triple component.
llvm-svn: 129838
2011-04-20 00:14:25 +00:00
f954a0f028
Target/PPC: Eliminate a use of getDarwinVers().
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llvm-svn: 129810
2011-04-19 20:57:03 +00:00
0ab5e2cded
Fix a ton of comment typos found by codespell. Patch by
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Luis Felipe Strano Moraes!
llvm-svn: 129558
2011-04-15 05:18:47 +00:00
13ce236c4c
Insert code in the right location when lowering PowerPC atomics.
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This causes defs to dominate uses, no instructions after terminators, and other
goodness.
llvm-svn: 128836
2011-04-04 17:57:29 +00:00
7067bff976
Use X0 instead of R0 for the zero register on ppc64.
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The 32-bit R0 cannot be used where a 64-bit register is expected.
llvm-svn: 128828
2011-04-04 17:07:06 +00:00
b2c80da4ae
Allow targets to specify a the type of the RHS of a shift parameterized on the type of the LHS.
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llvm-svn: 126518
2011-02-25 21:41:48 +00:00
f3292b2196
Revert r124611 - "Keep track of incoming argument's location while emitting LiveIns."
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In other words, do not keep track of argument's location. The debugger (gdb) is not prepared to see line table entries for arguments. For the debugger, "second" line table entry marks beginning of function body.
This requires some coordination with debugger to get this working.
- The debugger needs to be aware of prolog_end attribute attached with line table entries.
- The compiler needs to accurately mark prolog_end in line table entries (at -O0 and at -O1+)
llvm-svn: 126155
2011-02-21 23:21:26 +00:00
81c4306005
Swap VT and DebugLoc operands of getExtLoad() for consistency with
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other getNode() methods. Radar 9002173.
llvm-svn: 125665
2011-02-16 16:23:55 +00:00
56cc5fdf09
Keep track of incoming argument's location while emitting LiveIns.
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llvm-svn: 124611
2011-01-31 21:38:14 +00:00
249fcd4499
Remove unused variables found by gcc-4.6's -Wunused-but-set-variable.
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llvm-svn: 123707
2011-01-18 00:51:23 +00:00
2f93128109
Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.
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llvm-svn: 123170
2011-01-10 12:39:04 +00:00
9b43f33620
Change all self assignments X=X to (void)X, so that we can turn on a
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new gcc warning that complains on self-assignments and
self-initializations.
llvm-svn: 122458
2010-12-23 00:58:24 +00:00
3e5fbd74ed
rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for
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something that just glues two nodes together, even if it is
sometimes used for flags.
llvm-svn: 122310
2010-12-21 02:38:05 +00:00
527da1b6e2
Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.
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llvm-svn: 119990
2010-11-23 03:31:01 +00:00
dd6df84900
convert the operand bits into bitfields since they are all combinable in
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different ways. Add $non_lazy_ptr support, and proper lowering for
global values.
Now all the ppc regression tests pass with the new instruction printer.
llvm-svn: 119106
2010-11-15 03:13:19 +00:00
edb9d84dcc
add targetoperand flags for jump tables, constant pool and block address
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nodes to indicate when ha16/lo16 modifiers should be used. This lets
us pass PowerPC/indirectbr.ll.
The one annoying thing about this patch is that the MCSymbolExpr isn't
expressive enough to represent ha16(label1-label2) which we need on
PowerPC. I have a terrible hack in the meantime, but this will have
to be revisited at some point.
Last major conversion item left is global variable references.
llvm-svn: 119105
2010-11-15 02:46:57 +00:00
df8e17d80b
implement support for the MO_DARWIN_STUB TargetOperand flag,
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and have isel apply to to call operands as required. This allows
us to get $stub suffixes on label references on ppc/tiger with the
new instprinter, fixing two tests. Only 2 to go.
llvm-svn: 119093
2010-11-14 23:42:06 +00:00
71049f78ed
In the calling convention logic, ValVT is always a legal type,
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and as such can be represented by an MVT - the more complicated
EVT is not needed. Use MVT for ValVT everywhere.
llvm-svn: 118245
2010-11-04 10:49:57 +00:00
f5dda01f33
Inside the calling convention logic LocVT is always a simple
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value type, so there is no point in passing it around using
an EVT. Use the simpler MVT everywhere. Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.
llvm-svn: 118167
2010-11-03 11:35:31 +00:00
e8360b7182
Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.
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llvm-svn: 117667
2010-10-29 17:29:13 +00:00
ee4eb2bad1
Remove some variables that are never really used
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(gcc-4.6 warns about these).
llvm-svn: 117021
2010-10-21 16:03:28 +00:00
6c4353ecee
PowerPC varargs functions store live-in registers on the stack. Make sure we use
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virtual registers for those stores since RegAllocFast requires that each live
physreg only be used once.
This fixes PR8357.
llvm-svn: 116222
2010-10-11 20:43:09 +00:00
d10babfd65
fix the expansion of va_arg instruction on PPC to know the arg
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alignment for PPC32/64, avoiding some masking operations.
llvm-gcc expands vaarg inline instead of using the instruction
so it has never hit this.
llvm-svn: 116168
2010-10-10 18:34:00 +00:00
676c61db0e
update a bunch of code to use the MachinePointerInfo version of getStore.
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llvm-svn: 114461
2010-09-21 18:41:36 +00:00
6963c1f789
eliminate an old SelectionDAG::getTruncStore method, propagating
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MachinePointerInfo around more.
llvm-svn: 114452
2010-09-21 17:42:31 +00:00
3d178ed4d4
propagate MachinePointerInfo through various uses of the old
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SelectionDAG::getExtLoad overload, and eliminate it.
llvm-svn: 114446
2010-09-21 17:04:51 +00:00
7727d05dbb
convert the targets off the non-MachinePointerInfo of getLoad.
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llvm-svn: 114410
2010-09-21 06:44:06 +00:00
2510de2bea
reimplement memcpy/memmove/memset lowering to use MachinePointerInfo
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instead of srcvalue/offset pairs. This corrects SV info for mem
operations whose size is > 32-bits.
llvm-svn: 114401
2010-09-21 05:40:29 +00:00
e3d864b857
convert targets to the new MF.getMachineMemOperand interface.
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llvm-svn: 114391
2010-09-21 04:39:43 +00:00
31e90d2dd1
Use indirect calls in PowerPC JIT.
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See PR5201. There is no way to know if direct calls will be within the allowed
range for BL. Hence emit all calls as indirect when in JIT mode.
Without this long-running applications will fail to JIT on PowerPC with a
relocation failure.
llvm-svn: 110246
2010-08-04 20:47:44 +00:00
7595ce05a2
PR7781: Fix incorrect shifting in PPCTargetLowering::LowerBUILD_VECTOR.
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llvm-svn: 109998
2010-08-02 00:18:19 +00:00
1c349f18f8
Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument for consistency sake.
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llvm-svn: 107820
2010-07-07 22:15:37 +00:00
fe7532a308
Split the SDValue out of OutputArg so that SelectionDAG-independent
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code can do calling-convention queries. This obviates OutputArgReg.
llvm-svn: 107786
2010-07-07 15:54:55 +00:00
a3ca21b228
Propagate debug loc.
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llvm-svn: 107710
2010-07-06 22:08:15 +00:00
3439629239
Reapply r107655 with fixes; insert the pseudo instruction into
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the block before calling the expansion hook. And don't
put EFLAGS in a mbb's live-in list twice.
llvm-svn: 107691
2010-07-06 20:24:04 +00:00
f4f04107ef
Revert r107655.
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llvm-svn: 107668
2010-07-06 15:49:48 +00:00
Eli Friedman