Krzysztof Parzyszek
|
1d01a79304
|
[Hexagon] Standardize next batch of pseudo instructions
ALIGNA PS_aligna
ALLOCA PS_alloca
TFR_FI PS_fi
TFR_FIA PS_fia
TFR_PdFalse PS_false
TFR_PdTrue PS_true
VMULW PS_vmulw
VMULW_ACC PS_vmulw_acc
llvm-svn: 278832
|
2016-08-16 18:08:40 +00:00 |
Krzysztof Parzyszek
|
5da24e5495
|
[Hexagon] Equally-sized vectors are equivalent in ISel (except vNi1)
llvm-svn: 273885
|
2016-06-27 15:08:22 +00:00 |
Krzysztof Parzyszek
|
4eb6d4d1f2
|
[Hexagon] Hexagon V60 HVX intrinsic defintions
Author: Ron Lieberman <ronl@codeaurora.org>
llvm-svn: 254165
|
2015-11-26 16:54:33 +00:00 |
Krzysztof Parzyszek
|
421133470f
|
[Hexagon] Add support for vector instructions
llvm-svn: 232728
|
2015-03-19 16:33:08 +00:00 |
Colin LeMahieu
|
a66cf6f2df
|
[Hexagon] Since decoding conflicts have been resolved, isCodeGenOnly = 0 by default and remove explicitly setting it.
llvm-svn: 228316
|
2015-02-05 17:32:17 +00:00 |
Colin LeMahieu
|
cefca69d72
|
[Hexagon] Adding vector shift instructions and tests.
llvm-svn: 227619
|
2015-01-30 21:58:46 +00:00 |