Commit Graph

9 Commits

Author SHA1 Message Date
Yaxun Liu 9767089d00 [HIP] Support early finalization of device code for -fno-gpu-rdc
This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original
options as aliases. When -fgpu-rdc is off,
clang will assume the device code in each translation unit does not call
external functions except those in the device library, therefore it is possible
to compile the device code in each translation unit to self-contained kernels
and embed them in the host object, so that the host object behaves like
usual host object which can be linked by lld.

The benefits of this feature is: 1. allow users to create static libraries which
can be linked by host linker; 2. amortized device code linking time.

This patch modifies HIP action builder to insert actions for linking device
code and generating HIP fatbin, and pass HIP fatbin to host backend action.
It extracts code for constructing command for generating HIP fatbin as
a function so that it can be reused by early finalization. It also modifies
codegen of HIP host constructor functions to embed the device fatbin
when it is available.

Differential Revision: https://reviews.llvm.org/D52377

llvm-svn: 343611
2018-10-02 17:48:54 +00:00
Yaxun Liu 5e98c2b69d [HIP] Add -fvisibility hidden option to clang
AMDGPU target need -fvisibility hidden option for clang to
work around a limitation of no PLT support, otherwise there is compilation
error at -O0.

Differential Revision: https://reviews.llvm.org/D51434

llvm-svn: 341077
2018-08-30 15:10:20 +00:00
Yaxun Liu 6c3a74edc9 [HIP] pass -target-cpu when running the device-mode compiler
Differential Revision: https://reviews.llvm.org/D49643

llvm-svn: 337793
2018-07-24 01:40:44 +00:00
Aaron Enye Shi 02151cacca [HIP] Fix ordering of device-libs linking
Summary:
HIP should link the bitcodes with caller functions before callee functions. Also added lit test to check the ordering of the linked bitcodes is matches.

Reviewers: yaxunl, b-sumner

Reviewed By: yaxunl, b-sumner

Subscribers: cfe-commits, yaxunl, b-sumner, scchan

Differential Revision: https://reviews.llvm.org/D48667

llvm-svn: 335774
2018-06-27 19:51:42 +00:00
Aaron Enye Shi dfb1bf0478 [HIP] Support flush denormals bitcode
Summary:
Use oclc_daz_opt_on.amdgcn.bc bitcode when option fcuda-flush-denormal-to-zero is enabled, otherwise use oclc_daz_opt_off.amdgcn.bc bitcode. Added lit tests to verify that the correct bitcode is linked when -fcuda-flush-denormal-to-zero option is enabled or disabled.

Reviewers: yaxunl, scchan, b-sumner

Reviewed By: yaxunl, scchan, b-sumner

Subscribers: cfe-commits, yaxunl

Differential Revision: https://reviews.llvm.org/D48493

llvm-svn: 335765
2018-06-27 18:58:55 +00:00
Aaron Enye Shi 5c200be258 [HIP] Remove hip/hc.amdgcn.bc from HIP Toolchains
Summary:
The hc.amdgcn.bc and hip.amdgcn.bc are removed in VDI build and no longer needed.

Reviewers: yaxunl

Reviewed By: yaxunl

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D48455

llvm-svn: 335634
2018-06-26 17:40:36 +00:00
Aaron Enye Shi 4928d51791 [Test] Initial test commit access
llvm-svn: 335630
2018-06-26 17:12:29 +00:00
Sam McCall 43fdd22970 Fix -Wunused in NDEBUG introduced by HIP r333484
llvm-svn: 333514
2018-05-30 08:03:43 +00:00
Yaxun Liu f614422da9 Add HIP toolchain
This patch adds HIP toolchain to support HIP language mode. It includes:

Create specific compiler jobs for HIP.

Choose specific libraries for HIP.

With contribution from Greg Rodgers.

Differential Revision: https://reviews.llvm.org/D45212

llvm-svn: 333484
2018-05-30 00:53:50 +00:00