86 lines
2.7 KiB
C++
86 lines
2.7 KiB
C++
//=- WebAssemblySubtarget.h - Define Subtarget for the WebAssembly -*- C++ -*-//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// \brief This file declares the WebAssembly-specific subclass of
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/// TargetSubtarget.
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYSUBTARGET_H
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#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYSUBTARGET_H
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#include "WebAssemblyFrameLowering.h"
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#include "WebAssemblyISelLowering.h"
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#include "WebAssemblyInstrInfo.h"
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#include "WebAssemblySelectionDAGInfo.h"
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#include "llvm/Target/TargetSubtargetInfo.h"
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#include <string>
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#define GET_SUBTARGETINFO_HEADER
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#include "WebAssemblyGenSubtargetInfo.inc"
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namespace llvm {
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class WebAssemblySubtarget final : public WebAssemblyGenSubtargetInfo {
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bool HasSIMD128;
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/// String name of used CPU.
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std::string CPUString;
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/// What processor and OS we're targeting.
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Triple TargetTriple;
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WebAssemblyFrameLowering FrameLowering;
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WebAssemblyInstrInfo InstrInfo;
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WebAssemblySelectionDAGInfo TSInfo;
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WebAssemblyTargetLowering TLInfo;
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/// Initializes using CPUString and the passed in feature string so that we
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/// can use initializer lists for subtarget initialization.
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WebAssemblySubtarget &initializeSubtargetDependencies(StringRef FS);
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public:
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/// This constructor initializes the data members to match that
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/// of the specified triple.
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WebAssemblySubtarget(const Triple &TT, const std::string &CPU,
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const std::string &FS, const TargetMachine &TM);
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const WebAssemblySelectionDAGInfo *getSelectionDAGInfo() const override {
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return &TSInfo;
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}
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const WebAssemblyFrameLowering *getFrameLowering() const override {
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return &FrameLowering;
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}
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const WebAssemblyTargetLowering *getTargetLowering() const override {
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return &TLInfo;
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}
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const WebAssemblyInstrInfo *getInstrInfo() const override {
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return &InstrInfo;
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}
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const WebAssemblyRegisterInfo *getRegisterInfo() const override {
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return &getInstrInfo()->getRegisterInfo();
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}
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const Triple &getTargetTriple() const { return TargetTriple; }
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bool enableMachineScheduler() const override;
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bool useAA() const override;
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// Predicates used by WebAssemblyInstrInfo.td.
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bool hasAddr64() const { return TargetTriple.isArch64Bit(); }
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bool hasSIMD128() const { return HasSIMD128; }
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/// Parses features string setting specified subtarget options. Definition of
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/// function is auto generated by tblgen.
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void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
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};
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} // end namespace llvm
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#endif
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