86 lines
3.7 KiB
LLVM
86 lines
3.7 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -debug-only=machine-scheduler -o /dev/null %s 2>&1 | FileCheck --enable-var-scope --check-prefixes=CHECK,DBG %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck --enable-var-scope --check-prefixes=CHECK,GCN %s
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; REQUIRES: asserts
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; CHECK-LABEL: {{^}}cluster_load_cluster_store:
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define amdgpu_kernel void @cluster_load_cluster_store(i32* noalias %lb, i32* noalias %sb) {
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bb:
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; DBG: Cluster ld/st SU(1) - SU(2)
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; DBG: Cluster ld/st SU([[L1:[0-9]+]]) - SU([[L2:[0-9]+]])
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; DBG: Cluster ld/st SU([[L2]]) - SU([[L3:[0-9]+]])
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; DBG: Cluster ld/st SU([[L3]]) - SU([[L4:[0-9]+]])
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; GCN: flat_load_dword [[LD1:v[0-9]+]], v[{{[0-9:]+}}]
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; GCN-NEXT: flat_load_dword [[LD2:v[0-9]+]], v[{{[0-9:]+}}] offset:8
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; GCN-NEXT: flat_load_dword [[LD3:v[0-9]+]], v[{{[0-9:]+}}] offset:16
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; GCN-NEXT: flat_load_dword [[LD4:v[0-9]+]], v[{{[0-9:]+}}] offset:24
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%la0 = getelementptr inbounds i32, i32* %lb, i32 0
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%ld0 = load i32, i32* %la0
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%la1 = getelementptr inbounds i32, i32* %lb, i32 2
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%ld1 = load i32, i32* %la1
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%la2 = getelementptr inbounds i32, i32* %lb, i32 4
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%ld2 = load i32, i32* %la2
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%la3 = getelementptr inbounds i32, i32* %lb, i32 6
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%ld3 = load i32, i32* %la3
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; DBG: Cluster ld/st SU([[S1:[0-9]+]]) - SU([[S2:[0-9]+]])
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; DBG: Cluster ld/st SU([[S2]]) - SU([[S3:[0-9]+]])
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; DBG: Cluster ld/st SU([[S3]]) - SU([[S4:[0-9]+]])
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; GCN: flat_store_dword v[{{[0-9:]+}}], [[LD1]]
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; GCN-NEXT: flat_store_dword v[{{[0-9:]+}}], [[LD2]] offset:8
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; GCN-NEXT: flat_store_dword v[{{[0-9:]+}}], [[LD3]] offset:16
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; GCN-NEXT: flat_store_dword v[{{[0-9:]+}}], [[LD4]] offset:24
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%sa0 = getelementptr inbounds i32, i32* %sb, i32 0
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store i32 %ld0, i32* %sa0
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%sa1 = getelementptr inbounds i32, i32* %sb, i32 2
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store i32 %ld1, i32* %sa1
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%sa2 = getelementptr inbounds i32, i32* %sb, i32 4
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store i32 %ld2, i32* %sa2
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%sa3 = getelementptr inbounds i32, i32* %sb, i32 6
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store i32 %ld3, i32* %sa3
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ret void
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}
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; CHECK-LABEL: {{^}}cluster_load_valu_cluster_store:
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define amdgpu_kernel void @cluster_load_valu_cluster_store(i32* noalias %lb, i32* noalias %sb) {
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bb:
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; DBG: Cluster ld/st SU(1) - SU(2)
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; DBG: Cluster ld/st SU([[L1:[0-9]+]]) - SU([[L2:[0-9]+]])
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; DBG: Cluster ld/st SU([[L2]]) - SU([[L3:[0-9]+]])
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; DBG: Cluster ld/st SU([[L3]]) - SU([[L4:[0-9]+]])
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; GCN: flat_load_dword [[LD1:v[0-9]+]], v[{{[0-9:]+}}]
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; GCN-NEXT: flat_load_dword [[LD2:v[0-9]+]], v[{{[0-9:]+}}] offset:8
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; GCN-NEXT: flat_load_dword [[LD3:v[0-9]+]], v[{{[0-9:]+}}] offset:16
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; GCN-NEXT: flat_load_dword [[LD4:v[0-9]+]], v[{{[0-9:]+}}] offset:24
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%la0 = getelementptr inbounds i32, i32* %lb, i32 0
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%ld0 = load i32, i32* %la0
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%la1 = getelementptr inbounds i32, i32* %lb, i32 2
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%ld1 = load i32, i32* %la1
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%la2 = getelementptr inbounds i32, i32* %lb, i32 4
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%ld2 = load i32, i32* %la2
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%la3 = getelementptr inbounds i32, i32* %lb, i32 6
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%ld3 = load i32, i32* %la3
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; DBG: Cluster ld/st SU([[S1:[0-9]+]]) - SU([[S2:[0-9]+]])
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; DBG: Cluster ld/st SU([[S2]]) - SU([[S3:[0-9]+]])
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; DBG: Cluster ld/st SU([[S3]]) - SU([[S4:[0-9]+]])
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; GCN: v_add_u32_e32 [[ST2:v[0-9]+]], 1, [[LD2]]
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; GCN: flat_store_dword v[{{[0-9:]+}}], [[LD1]]
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; GCN-NEXT: flat_store_dword v[{{[0-9:]+}}], [[ST2]] offset:8
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; GCN-NEXT: flat_store_dword v[{{[0-9:]+}}], [[LD3]] offset:16
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; GCN-NEXT: flat_store_dword v[{{[0-9:]+}}], [[LD4]] offset:24
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%sa0 = getelementptr inbounds i32, i32* %sb, i32 0
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store i32 %ld0, i32* %sa0
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%sa1 = getelementptr inbounds i32, i32* %sb, i32 2
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%add = add i32 %ld1, 1
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store i32 %add, i32* %sa1
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%sa2 = getelementptr inbounds i32, i32* %sb, i32 4
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store i32 %ld2, i32* %sa2
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%sa3 = getelementptr inbounds i32, i32* %sb, i32 6
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store i32 %ld3, i32* %sa3
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ret void
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}
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