llvm-project/llvm/lib/Transforms/InstCombine
Sanjay Patel 2fa8fc3d0a [InstCombine] freeze operand in div+mul fold
As discussed in issue #37809, this transform is not safe
if the input is an undefined value.

This is similar to recent changes for urem and sdiv:
d428f09b2c
99ef341ce9

There is no difference in codegen on the basic examples,
but this could lead to regressions. We may need to
improve freeze analysis or lowering if that happens.

Presumably, in real cases that are similar to the tests
where a subsequent transform removes the rem, we
will also be able to remove the freeze by seeing that
the parameter has 'noundef'.
2022-05-12 13:49:29 -04:00
..
CMakeLists.txt llvmbuildectomy - replace llvm-build by plain cmake 2020-11-13 10:35:24 +01:00
InstCombineAddSub.cpp [InstCombine] sub(add(X,Y),umin(Y,Z)) --> add(X,usub.sat(Y,Z)) 2022-05-07 17:17:48 +08:00
InstCombineAndOrXor.cpp [InstCombine] Fix scalable-vector bitwise select matching 2022-05-06 12:59:39 +01:00
InstCombineAtomicRMW.cpp Cleanup includes: Transform/Scalar 2022-03-03 07:56:34 +01:00
InstCombineCalls.cpp [InstCombine] Remove side effect of replaced constrained intrinsics 2022-05-07 19:04:11 +07:00
InstCombineCasts.cpp [InstCombine] fix miscompile when casting int->FP->int 2022-05-07 08:46:25 -04:00
InstCombineCompares.cpp [InstCombine] Handle GEP scalar/vector base mismatch (PR55363) 2022-05-10 11:26:43 +02:00
InstCombineInternal.h [InstCombine] Freeze other uses of frozen value 2022-05-11 16:47:12 +02:00
InstCombineLoadStoreAlloca.cpp [InstCombine] Remove memset of undef value 2022-04-29 14:51:18 +02:00
InstCombineMulDivRem.cpp [InstCombine] freeze operand in div+mul fold 2022-05-12 13:49:29 -04:00
InstCombineNegator.cpp [InstCombine] Fold sub(Y,and(lshr(X,C),1)) --> add(ashr(shl(X,(BW-1)-C),BW-1),Y) (PR53610) 2022-02-15 13:24:20 +00:00
InstCombinePHI.cpp Reapply [InstCombine] Support switch in phi to cond fold 2022-03-17 10:03:09 +01:00
InstCombineSelect.cpp [InstCombine] Remove the undef-related workaround code in visitSelectInst 2022-04-30 20:48:42 +09:00
InstCombineShifts.cpp [InstCombine] try to narrow more shifted bswap-of-zext 2022-05-06 10:45:10 +08:00
InstCombineSimplifyDemanded.cpp [InstCombine] SimplifyDemandedUseBits - allow and(srem(X,Pow2),C) -> and(X,C) to work on vector types 2022-04-07 15:24:45 +01:00
InstCombineVectorOps.cpp [InstCombine] fold shuffles with FP<->Int cast operands 2022-05-10 14:20:43 -04:00
InstructionCombining.cpp [InstCombine] Freeze other uses of frozen value 2022-05-11 16:47:12 +02:00