When encoded to thumb, VFP instruction and VMOV/VDUP between scalar and core registers, must have their predicate bit to 0b1110. llvm-svn: 184707 |
||
|---|---|---|
| .. | ||
| ARMDisassembler.cpp | ||
| CMakeLists.txt | ||
| LLVMBuild.txt | ||
| Makefile | ||
When encoded to thumb, VFP instruction and VMOV/VDUP between scalar and core registers, must have their predicate bit to 0b1110. llvm-svn: 184707 |
||
|---|---|---|
| .. | ||
| ARMDisassembler.cpp | ||
| CMakeLists.txt | ||
| LLVMBuild.txt | ||
| Makefile | ||