74 lines
1.8 KiB
LLVM
74 lines
1.8 KiB
LLVM
; Test 32-bit square root.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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declare float @llvm.sqrt.f32(float %f)
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; Check register square root.
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define float @f1(float %val) {
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; CHECK: f1:
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; CHECK: sqebr %f0, %f0
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; CHECK: br %r14
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%res = call float @llvm.sqrt.f32(float %val)
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ret float %res
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}
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; Check the low end of the SQEB range.
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define float @f2(float *%ptr) {
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; CHECK: f2:
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; CHECK: sqeb %f0, 0(%r2)
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; CHECK: br %r14
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%val = load float *%ptr
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%res = call float @llvm.sqrt.f32(float %val)
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ret float %res
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}
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; Check the high end of the aligned SQEB range.
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define float @f3(float *%base) {
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; CHECK: f3:
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; CHECK: sqeb %f0, 4092(%r2)
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; CHECK: br %r14
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%ptr = getelementptr float *%base, i64 1023
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%val = load float *%ptr
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%res = call float @llvm.sqrt.f32(float %val)
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ret float %res
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}
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; Check the next word up, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define float @f4(float *%base) {
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; CHECK: f4:
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; CHECK: aghi %r2, 4096
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; CHECK: sqeb %f0, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr float *%base, i64 1024
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%val = load float *%ptr
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%res = call float @llvm.sqrt.f32(float %val)
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ret float %res
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}
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; Check negative displacements, which also need separate address logic.
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define float @f5(float *%base) {
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; CHECK: f5:
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; CHECK: aghi %r2, -4
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; CHECK: sqeb %f0, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr float *%base, i64 -1
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%val = load float *%ptr
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%res = call float @llvm.sqrt.f32(float %val)
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ret float %res
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}
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; Check that SQEB allows indices.
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define float @f6(float *%base, i64 %index) {
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; CHECK: f6:
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; CHECK: sllg %r1, %r3, 2
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; CHECK: sqeb %f0, 400(%r1,%r2)
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; CHECK: br %r14
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%ptr1 = getelementptr float *%base, i64 %index
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%ptr2 = getelementptr float *%ptr1, i64 100
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%val = load float *%ptr2
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%res = call float @llvm.sqrt.f32(float %val)
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ret float %res
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}
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