92 lines
3.6 KiB
C++
92 lines
3.6 KiB
C++
//===--- SPIRVUtils.h ---- SPIR-V Utility Functions -------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains miscellaneous utility functions.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_SPIRV_SPIRVUTILS_H
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#define LLVM_LIB_TARGET_SPIRV_SPIRVUTILS_H
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#include "MCTargetDesc/SPIRVBaseInfo.h"
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#include "llvm/IR/IRBuilder.h"
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#include <string>
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namespace llvm {
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class MCInst;
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class MachineFunction;
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class MachineInstr;
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class MachineInstrBuilder;
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class MachineIRBuilder;
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class MachineRegisterInfo;
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class Register;
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class StringRef;
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class SPIRVInstrInfo;
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// Add the given string as a series of integer operand, inserting null
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// terminators and padding to make sure the operands all have 32-bit
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// little-endian words.
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void addStringImm(const StringRef &Str, MCInst &Inst);
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void addStringImm(const StringRef &Str, MachineInstrBuilder &MIB);
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void addStringImm(const StringRef &Str, IRBuilder<> &B,
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std::vector<Value *> &Args);
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// Read the series of integer operands back as a null-terminated string using
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// the reverse of the logic in addStringImm.
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std::string getStringImm(const MachineInstr &MI, unsigned StartIndex);
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// Add the given numerical immediate to MIB.
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void addNumImm(const APInt &Imm, MachineInstrBuilder &MIB);
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// Add an OpName instruction for the given target register.
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void buildOpName(Register Target, const StringRef &Name,
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MachineIRBuilder &MIRBuilder);
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// Add an OpDecorate instruction for the given Reg.
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void buildOpDecorate(Register Reg, MachineIRBuilder &MIRBuilder,
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SPIRV::Decoration::Decoration Dec,
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const std::vector<uint32_t> &DecArgs,
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StringRef StrImm = "");
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void buildOpDecorate(Register Reg, MachineInstr &I, const SPIRVInstrInfo &TII,
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SPIRV::Decoration::Decoration Dec,
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const std::vector<uint32_t> &DecArgs,
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StringRef StrImm = "");
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// Convert a SPIR-V storage class to the corresponding LLVM IR address space.
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unsigned storageClassToAddressSpace(SPIRV::StorageClass::StorageClass SC);
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// Convert an LLVM IR address space to a SPIR-V storage class.
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SPIRV::StorageClass::StorageClass
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addressSpaceToStorageClass(unsigned AddrSpace);
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SPIRV::MemorySemantics::MemorySemantics
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getMemSemanticsForStorageClass(SPIRV::StorageClass::StorageClass SC);
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SPIRV::MemorySemantics::MemorySemantics getMemSemantics(AtomicOrdering Ord);
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// Find def instruction for the given ConstReg, walking through
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// spv_track_constant and ASSIGN_TYPE instructions. Updates ConstReg by def
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// of OpConstant instruction.
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MachineInstr *getDefInstrMaybeConstant(Register &ConstReg,
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const MachineRegisterInfo *MRI);
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// Get constant integer value of the given ConstReg.
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uint64_t getIConstVal(Register ConstReg, const MachineRegisterInfo *MRI);
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// Check if MI is a SPIR-V specific intrinsic call.
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bool isSpvIntrinsic(MachineInstr &MI, Intrinsic::ID IntrinsicID);
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// Get type of i-th operand of the metadata node.
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Type *getMDOperandAsType(const MDNode *N, unsigned I);
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// Return a demangled name with arg type info by itaniumDemangle().
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// If the parser fails, return only function name.
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std::string mayBeOclOrSpirvBuiltin(StringRef Name);
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} // namespace llvm
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#endif // LLVM_LIB_TARGET_SPIRV_SPIRVUTILS_H
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