OSchip
/
llvm-project
mirror of https://github.com/THU-DSP-LAB/llvm-project.git
13
0
Fork 6
Code Issues Packages Projects Releases Wiki Activity
llvm-project/compiler-rt/lib/builtins/riscv
History
Jessica Clarke b8d83e83be [RISCV][compiler-rt] Fix an incorrect comment for RV64 __riscv_restore_12 
This was presumably copied from the RV32 implementation and not updated
like the rest.
 		2021-09-15 15:25:59 +01:00
..
int_mul_impl.inc [compiler-rt][builtins][RISCV] Always include __mul[sd]i3 builtin definitions 2020-10-21 09:49:03 +01:00
muldi3.S
…
mulsi3.S
…
restore.S [RISCV][compiler-rt] Fix an incorrect comment for RV64 __riscv_restore_12 2021-09-15 15:25:59 +01:00
save.S [RISCV][compiler-rt] Add missing __riscv_save_1/0 labels for RV64 2021-09-15 14:42:16 +01:00