..
AsmParser
[AArch64][SME] Support NEON vector to GPR integer moves in streaming mode
2021-09-03 07:59:17 +00:00
Disassembler
[AArch64][SME] Support NEON vector to GPR integer moves in streaming mode
2021-09-03 07:59:17 +00:00
GISel
[AArch64][GlobalISel] Fix crash in the extend(extract_vector_elt) optimization.
2021-09-23 23:07:16 -07:00
MCTargetDesc
[MC] Use local MCSubtargetInfo in writeNops
2021-09-07 15:46:19 +01:00
TargetInfo
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Utils
[AArch64][SVE] Add API for conversion between SVE predicate pattern and element number. NFC
2021-08-27 20:03:48 +08:00
AArch64.h
[AArch64][GlobalISel] Create a new minimal combiner pass just for -O0.
2021-05-07 17:01:27 -07:00
AArch64.td
[AArch64] Improve schedule modelling on the Cortex-A55
2021-09-21 13:03:34 +01:00
AArch64A53Fix835769.cpp
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AArch64A57FPLoadBalancing.cpp
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AArch64AdvSIMDScalarPass.cpp
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AArch64AsmPrinter.cpp
[MC] Add MCSubtargetInfo to MCAlignFragment
2021-09-07 15:46:19 +01:00
AArch64BranchTargets.cpp
[AArch64] Fix for BTI landing pad insertion with PAC-RET+bkey.
2021-04-23 10:07:25 +02:00
AArch64CallingConvention.cpp
[clang][AArch64] Correctly align HFA arguments when passed on the stack
2021-04-15 22:58:14 +01:00
AArch64CallingConvention.h
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AArch64CallingConvention.td
[AArch64] Replace unneeded CCAssignToRegWithShadow with CCAssignToReg
2021-08-21 16:33:29 -07:00
AArch64CleanupLocalDynamicTLSPass.cpp
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AArch64CollectLOH.cpp
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AArch64Combine.td
[AArch64][GlobalISel] Add ptradd_immed_chain combine to post-legalizer combiner.
2021-08-11 13:59:23 -07:00
AArch64CompressJumpTables.cpp
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AArch64CondBrTuning.cpp
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AArch64ConditionOptimizer.cpp
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AArch64ConditionalCompares.cpp
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AArch64DeadRegisterDefinitionsPass.cpp
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AArch64ExpandImm.cpp
[AArch64] Fix some coding standard issues related to namespace llvm
2021-05-05 15:27:16 -07:00
AArch64ExpandImm.h
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AArch64ExpandPseudoInsts.cpp
[Aarch64] Correct register class for pseudo instructions
2021-09-09 14:31:49 -04:00
AArch64FalkorHWPFFix.cpp
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AArch64FastISel.cpp
[AArch64] Optimize overflow checks for [s|u]mul.with.overflow.i32.
2021-07-12 15:30:42 -07:00
AArch64FrameLowering.cpp
Add a command-line flag to control the Swift extended async frame info.
2021-09-16 06:57:45 -07:00
AArch64FrameLowering.h
[NFC] Fix a few whitespace issues and typos.
2021-07-04 11:49:58 +01:00
AArch64GenRegisterBankInfo.def
AArch64: support i128 cmpxchg in GlobalISel.
2021-05-14 10:41:38 +01:00
AArch64ISelDAGToDAG.cpp
[SelectionDAG] Add isZero/isAllOnes methods to ConstantSDNode.
2021-09-09 13:28:30 -07:00
AArch64ISelLowering.cpp
AArch64: use indivisible cmpxchg for 128-bit atomic loads at O0
2021-09-22 14:20:43 +01:00
AArch64ISelLowering.h
AArch64: use ldp/stp for 128-bit atomic load/store in v.84 onwards
2021-09-20 09:50:11 +01:00
AArch64InstrAtomics.td
[AArch64] Fix i128 cmpxchg using ldxp/stxp.
2021-07-20 12:38:12 -07:00
AArch64InstrFormats.td
[AArch64] NFC: Use 'asm' in SIMDScalarCPY
2021-09-14 08:26:15 +00:00
AArch64InstrGISel.td
AArch64: support i128 cmpxchg in GlobalISel.
2021-05-14 10:41:38 +01:00
AArch64InstrInfo.cpp
[MachineOutliner][AArch64] Ensure LR is live-in when inserting reg-save calls
2021-09-08 17:44:27 -07:00
AArch64InstrInfo.h
[InstrInfo] Use 64-bit immediates for analyzeCompare() (NFCI)
2021-08-30 19:46:04 +02:00
AArch64InstrInfo.td
[AArch64] NFC: Use 'asm' in SIMDScalarCPY
2021-09-14 08:26:15 +00:00
AArch64LoadStoreOptimizer.cpp
AArch64: don't form indexed paired ops if base reg overlaps operands.
2021-08-20 11:39:38 +01:00
AArch64LowerHomogeneousPrologEpilog.cpp
[CodeGen] Add missing includes (NFC)
2021-06-06 15:48:27 +02:00
AArch64MCInstLower.cpp
[AArch64][ELF] Prefer to lower MC_GlobalAddress operands to .Lfoo$local
2021-05-07 09:44:26 -07:00
AArch64MCInstLower.h
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AArch64MachineFunctionInfo.cpp
[llvm] Rename StringRef _lower() method calls to _insensitive()
2021-06-25 00:22:01 +03:00
AArch64MachineFunctionInfo.h
IR/AArch64/X86: add "swifttailcc" calling convention.
2021-05-17 10:48:34 +01:00
AArch64MacroFusion.cpp
[AArch64] Fix some coding standard issues related to namespace llvm
2021-05-05 15:27:16 -07:00
AArch64MacroFusion.h
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AArch64PBQPRegAlloc.cpp
[NFCI] Move DEBUG_TYPE definition below #includes
2021-05-30 17:31:01 +08:00
AArch64PBQPRegAlloc.h
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AArch64PerfectShuffle.h
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AArch64PfmCounters.td
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AArch64PromoteConstant.cpp
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AArch64RedundantCopyElimination.cpp
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AArch64RegisterBanks.td
AArch64: support i128 cmpxchg in GlobalISel.
2021-05-14 10:41:38 +01:00
AArch64RegisterInfo.cpp
[AArch64][SME] Add load and store instructions
2021-07-16 10:11:10 +00:00
AArch64RegisterInfo.h
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AArch64RegisterInfo.td
[AArch64][SVE] NFC: Remove unused p0-p7 with element size predicates
2021-08-10 07:56:22 +00:00
AArch64SIMDInstrOpt.cpp
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AArch64SLSHardening.cpp
[ARM][AArch64] SLSHardening: make non-comdat thunks possible
2021-05-20 17:07:05 +02:00
AArch64SMEInstrInfo.td
[AArch64][SME] Add zero instruction
2021-07-27 08:35:45 +00:00
AArch64SVEInstrInfo.td
[AArch64][SVE] Add extract_subvector patterns for unpacked fp16 and bfloat types.
2021-09-22 14:25:17 +01:00
AArch64SchedA53.td
[AArch64] Correct store ReadAdrBase operand
2021-08-23 21:07:55 +01:00
AArch64SchedA55.td
[AArch64] Correct store ReadAdrBase operand
2021-08-23 21:07:55 +01:00
AArch64SchedA57.td
[AArch64] Correct store ReadAdrBase operand
2021-08-23 21:07:55 +01:00
AArch64SchedA57WriteRes.td
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AArch64SchedA64FX.td
[AArch64] Correct store ReadAdrBase operand
2021-08-23 21:07:55 +01:00
AArch64SchedCyclone.td
[AArch64] Correct store ReadAdrBase operand
2021-08-23 21:07:55 +01:00
AArch64SchedExynosM3.td
[AArch64] Correct store ReadAdrBase operand
2021-08-23 21:07:55 +01:00
AArch64SchedExynosM4.td
[AArch64] Correct store ReadAdrBase operand
2021-08-23 21:07:55 +01:00
AArch64SchedExynosM5.td
[AArch64] Correct store ReadAdrBase operand
2021-08-23 21:07:55 +01:00
AArch64SchedFalkor.td
[AArch64] Correct store ReadAdrBase operand
2021-08-23 21:07:55 +01:00
AArch64SchedFalkorDetails.td
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AArch64SchedKryo.td
[AArch64] Correct store ReadAdrBase operand
2021-08-23 21:07:55 +01:00
AArch64SchedKryoDetails.td
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AArch64SchedPredExynos.td
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AArch64SchedPredicates.td
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AArch64SchedTSV110.td
[AArch64] Correct store ReadAdrBase operand
2021-08-23 21:07:55 +01:00
AArch64SchedThunderX.td
[AArch64] Correct store ReadAdrBase operand
2021-08-23 21:07:55 +01:00
AArch64SchedThunderX2T99.td
[AArch64] Correct store ReadAdrBase operand
2021-08-23 21:07:55 +01:00
AArch64SchedThunderX3T110.td
[AArch64] Correct store ReadAdrBase operand
2021-08-23 21:07:55 +01:00
AArch64Schedule.td
[AArch64] Correct store ReadAdrBase operand
2021-08-23 21:07:55 +01:00
AArch64SelectionDAGInfo.cpp
[SelectionDAG] Add isZero/isAllOnes methods to ConstantSDNode.
2021-09-09 13:28:30 -07:00
AArch64SelectionDAGInfo.h
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AArch64SpeculationHardening.cpp
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AArch64StackTagging.cpp
[hwasan] Support more complicated lifetimes.
2021-09-03 10:29:50 +01:00
AArch64StackTaggingPreRA.cpp
[llvm] Use pop_back_val (NFC)
2021-09-19 13:44:23 -07:00
AArch64StorePairSuppress.cpp
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AArch64Subtarget.cpp
[AArch64][SVE] Wire up vscale_range attribute to SVE min/max vector queries
2021-06-21 13:00:36 +01:00
AArch64Subtarget.h
AArch64: use ldp/stp for 128-bit atomic load/store in v.84 onwards
2021-09-20 09:50:11 +01:00
AArch64SystemOperands.td
[AArch64][MC] Merge FeaturePMU into FeaturePerfMon
2021-09-06 14:56:49 +01:00
AArch64TargetMachine.cpp
Fix typo in help text for -aarch64-enable-branch-targets.
2021-07-05 16:15:40 +01:00
AArch64TargetMachine.h
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AArch64TargetObjectFile.cpp
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AArch64TargetObjectFile.h
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AArch64TargetTransformInfo.cpp
[AArch64][SVE][InstCombine] Eliminate redundant chains of tuple get/set
2021-09-22 20:59:46 -07:00
AArch64TargetTransformInfo.h
[Target][CodeGen] Remove default CostKind arguments on inner/impl TTI overrides
2021-09-22 15:28:08 +01:00
CMakeLists.txt
[AArch64][GlobalISel] Create a new minimal combiner pass just for -O0.
2021-05-07 17:01:27 -07:00
SMEInstrFormats.td
[AArch64][SME] Fix imm bug in mov vector to tile aliases
2021-09-08 07:42:16 +00:00
SVEInstrFormats.td
[AArch64][SVE] NFC: Remove unused template args
2021-09-09 07:10:57 +00:00
SVEIntrinsicOpts.cpp
[llvm][clang][NFC] updates inline licence info
2021-08-11 02:48:53 +00:00