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llvm-project/llvm/lib/Target/Mips/AsmParser
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Toma Tabacu 8e0316d439 [mips] [IAS] Add support for LAReg with identical source and destination register operands. 
Summary: In this case, we're supposed to load the immediate in AT and then ADDu it with the source register and put it in the destination register.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9367

llvm-svn: 240278
 		2015-06-22 13:10:23 +00:00
..
CMakeLists.txt [CMake] Let add_public_tablegen_target responsible to provide dependency to CommonTableGen. 2013-11-28 17:04:04 +00:00
LLVMBuild.txt LLVMBuild.txt: Reformat. 2014-04-10 11:16:17 +00:00
Makefile
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MipsAsmParser.cpp [mips] [IAS] Add support for LAReg with identical source and destination register operands. 2015-06-22 13:10:23 +00:00