90 lines
5.9 KiB
LLVM
90 lines
5.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
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; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=ALL,FASTF64 %s
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; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileCheck -check-prefixes=ALL,SLOWF64 %s
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; RUN: opt -cost-model -analyze -cost-kind=code-size -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=ALL-SIZE,FASTF64-SIZE %s
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; RUN: opt -cost-model -analyze -cost-kind=code-size -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileCheck -check-prefixes=ALL-SIZE,SLOW64-SIZE %s
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; END.
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define amdgpu_kernel void @fsub_f32() #0 {
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; ALL-LABEL: 'fsub_f32'
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; ALL-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f32 = fsub float undef, undef
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; ALL-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f32 = fsub <2 x float> undef, undef
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; ALL-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v3f32 = fsub <3 x float> undef, undef
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; ALL-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v5f32 = fsub <5 x float> undef, undef
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; ALL-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
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;
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; ALL-SIZE-LABEL: 'fsub_f32'
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; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f32 = fsub float undef, undef
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; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f32 = fsub <2 x float> undef, undef
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; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v3f32 = fsub <3 x float> undef, undef
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; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v5f32 = fsub <5 x float> undef, undef
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; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
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;
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%f32 = fsub float undef, undef
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%v2f32 = fsub <2 x float> undef, undef
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%v3f32 = fsub <3 x float> undef, undef
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%v5f32 = fsub <5 x float> undef, undef
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ret void
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}
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define amdgpu_kernel void @fsub_f64() #0 {
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; FASTF64-LABEL: 'fsub_f64'
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; FASTF64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f64 = fsub double undef, undef
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; FASTF64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2f64 = fsub <2 x double> undef, undef
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; FASTF64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v3f64 = fsub <3 x double> undef, undef
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; FASTF64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
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;
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; SLOWF64-LABEL: 'fsub_f64'
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; SLOWF64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %f64 = fsub double undef, undef
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; SLOWF64-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v2f64 = fsub <2 x double> undef, undef
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; SLOWF64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v3f64 = fsub <3 x double> undef, undef
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; SLOWF64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
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;
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; ALL-SIZE-LABEL: 'fsub_f64'
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; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f64 = fsub double undef, undef
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; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2f64 = fsub <2 x double> undef, undef
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; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v3f64 = fsub <3 x double> undef, undef
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; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
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;
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%f64 = fsub double undef, undef
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%v2f64 = fsub <2 x double> undef, undef
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%v3f64 = fsub <3 x double> undef, undef
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ret void
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}
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define amdgpu_kernel void @fsub_f16() #0 {
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; FASTF64-LABEL: 'fsub_f16'
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; FASTF64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f16 = fsub half undef, undef
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; FASTF64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16 = fsub <2 x half> undef, undef
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; FASTF64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v3f16 = fsub <3 x half> undef, undef
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; FASTF64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f16 = fsub <4 x half> undef, undef
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; FASTF64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
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;
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; SLOWF64-LABEL: 'fsub_f16'
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; SLOWF64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f16 = fsub half undef, undef
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; SLOWF64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f16 = fsub <2 x half> undef, undef
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; SLOWF64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v3f16 = fsub <3 x half> undef, undef
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; SLOWF64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4f16 = fsub <4 x half> undef, undef
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; SLOWF64-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
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;
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; FASTF64-SIZE-LABEL: 'fsub_f16'
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; FASTF64-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f16 = fsub half undef, undef
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; FASTF64-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16 = fsub <2 x half> undef, undef
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; FASTF64-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v3f16 = fsub <3 x half> undef, undef
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; FASTF64-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f16 = fsub <4 x half> undef, undef
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; FASTF64-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
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;
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; SLOW64-SIZE-LABEL: 'fsub_f16'
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; SLOW64-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f16 = fsub half undef, undef
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; SLOW64-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f16 = fsub <2 x half> undef, undef
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; SLOW64-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v3f16 = fsub <3 x half> undef, undef
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; SLOW64-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4f16 = fsub <4 x half> undef, undef
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; SLOW64-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
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;
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%f16 = fsub half undef, undef
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%v2f16 = fsub <2 x half> undef, undef
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%v3f16 = fsub <3 x half> undef, undef
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%v4f16 = fsub <4 x half> undef, undef
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ret void
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}
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