| .. |
|
AArch64
|
[GlobalISel] Handle more types in narrowScalar for eq/ne G_ICMP
|
2021-07-12 22:18:50 -07:00 |
|
AMDGPU
|
[GlobalISel] Add a new artifact combiner for unmerge which looks through general artifact expressions.
|
2021-07-09 22:35:00 -07:00 |
|
ARC
|
…
|
|
|
ARM
|
[ARM] Add lowering of uadd_sat to uq{add|sub}8 and uq{add|sub}16
|
2021-07-11 15:58:11 +01:00 |
|
AVR
|
Place the BlockAddress type in the address space of the containing function
|
2021-07-02 12:17:55 +01:00 |
|
BPF
|
…
|
|
|
Generic
|
[llc] Default MCUseDwarfDirectory to true
|
2021-07-12 17:44:02 -07:00 |
|
Hexagon
|
[DAG] Reassociate Add with Or
|
2021-07-07 10:21:07 +01:00 |
|
Inputs
|
…
|
|
|
Lanai
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
|
M68k
|
[M68k][GloballSel] Lower outgoing return values in IRTranslator
|
2021-07-05 11:39:09 -07:00 |
|
MIR
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
|
MSP430
|
…
|
|
|
Mips
|
[llvm][sve] Lowering for VLS truncating stores
|
2021-07-12 11:14:17 +01:00 |
|
NVPTX
|
tests/CodeGen: Use %python lit substitution when invoking python
|
2021-07-06 18:46:36 -07:00 |
|
PowerPC
|
[PowerPC] Fix the splat immediate in PPCMIPeephole depending on if we have an Altivec and VSX splat instruction.
|
2021-07-12 16:20:11 -05:00 |
|
RISCV
|
[SelectionDAG][RISCV] Support @llvm.vscale.i64() on 32-bit targets.
|
2021-07-12 14:53:42 -07:00 |
|
SPARC
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
|
SystemZ
|
[SystemZ] Bugfix for the 'N' code for inline asm operand.
|
2021-07-12 15:04:08 +02:00 |
|
Thumb
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
|
Thumb2
|
[ARM] Expand types in VQDMULH tests. NFC
|
2021-07-12 17:56:11 +01:00 |
|
VE
|
[LegalizeTypes][VE] Don't Expand BITREVERSE/BSWAP during type legalization promotion if they will be promoted for NVT in op legalization.
|
2021-06-29 11:00:11 -07:00 |
|
WebAssembly
|
[WebAssembly] Custom combines for f32x4.demote_zero_f64x2
|
2021-07-12 10:32:18 -07:00 |
|
WinCFGuard
|
…
|
|
|
WinEH
|
…
|
|
|
X86
|
Revert "[X86][SSE] X86ISD::FSETCC nodes (cmpss/cmpsd) return a 0/-1 allbits signbits result"
|
2021-07-12 22:26:54 -07:00 |
|
XCore
|
Update @llvm.powi to handle different int sizes for the exponent
|
2021-06-17 09:38:28 +02:00 |
606551ee98