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llvm-project/llvm/test/MC/Mips/micromips
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Simon Dardis 6efb8dd2e3 [mips] seb, seh instruction aliases 
Add the single operand form.

Reviewers: vkalintiris

Differential Revision: https://reviews.llvm.org/D26961

llvm-svn: 287681
 		2016-11-22 19:17:23 +00:00
..
invalid-wrong-error.s [mips][microMIPS] Add CodeGen support for microMIPSr6 ROTR and ROTRV and add tests for LL, SC, SYSCALL, ROTR, ROTRV, LWM32, SWM32 and MOVEP instructions 2016-05-04 12:02:12 +00:00
invalid.s [mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support 2016-07-11 07:41:56 +00:00
valid.s [mips] seb, seh instruction aliases 2016-11-22 19:17:23 +00:00