19 lines
456 B
TableGen
19 lines
456 B
TableGen
// DXIL doesn't actually use registers, but this gets the boilerplate code
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// generated through tablegen.
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let Namespace = "DXIL" in {
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def DXIL : Register<"DXIL">;
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def DXILClass : RegisterClass<"DXIL", [i32], 32, (add DXIL)>;
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}
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class DXILInst : Instruction {
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let Namespace = "DXIL";
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let DecoderNamespace = "DXIL";
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dag OutOperandList = (outs);
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dag InOperandList = (ins);
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let AsmString = "dummy";
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let Pattern = [];
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}
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def DummyInst : DXILInst;
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