128 lines
4.7 KiB
C++
128 lines
4.7 KiB
C++
//=- LoongArchMCCodeEmitter.cpp - Convert LoongArch code to machine code --===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the LoongArchMCCodeEmitter class.
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/LoongArchBaseInfo.h"
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#include "MCTargetDesc/LoongArchMCTargetDesc.h"
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#include "llvm/MC/MCCodeEmitter.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCInstBuilder.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/Support/EndianStream.h"
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using namespace llvm;
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#define DEBUG_TYPE "mccodeemitter"
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namespace {
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class LoongArchMCCodeEmitter : public MCCodeEmitter {
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LoongArchMCCodeEmitter(const LoongArchMCCodeEmitter &) = delete;
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void operator=(const LoongArchMCCodeEmitter &) = delete;
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MCContext &Ctx;
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MCInstrInfo const &MCII;
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public:
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LoongArchMCCodeEmitter(MCContext &ctx, MCInstrInfo const &MCII)
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: Ctx(ctx), MCII(MCII) {}
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~LoongArchMCCodeEmitter() override {}
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void encodeInstruction(const MCInst &MI, raw_ostream &OS,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const override;
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/// TableGen'erated function for getting the binary encoding for an
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/// instruction.
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uint64_t getBinaryCodeForInstr(const MCInst &MI,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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/// Return binary encoding of operand. If the machine operand requires
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/// relocation, record the relocation and return zero.
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unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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/// Return binary encoding of an immediate operand specified by OpNo.
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/// The value returned is the value of the immediate minus 1.
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/// Note that this function is dedicated to specific immediate types,
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/// e.g. uimm2_plus1.
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unsigned getImmOpValueSub1(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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/// Return binary encoding of an immediate operand specified by OpNo.
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/// The value returned is the value of the immediate shifted right
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// arithmetically by 2.
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/// Note that this function is dedicated to specific immediate types,
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/// e.g. simm14_lsl2, simm16_lsl2, simm21_lsl2 and simm26_lsl2.
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unsigned getImmOpValueAsr2(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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};
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} // end namespace
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unsigned
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LoongArchMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const {
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if (MO.isReg())
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return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg());
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if (MO.isImm())
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return static_cast<unsigned>(MO.getImm());
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llvm_unreachable("Unhandled expression!");
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}
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unsigned
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LoongArchMCCodeEmitter::getImmOpValueSub1(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const {
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return MI.getOperand(OpNo).getImm() - 1;
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}
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unsigned
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LoongArchMCCodeEmitter::getImmOpValueAsr2(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const {
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unsigned Res = MI.getOperand(OpNo).getImm();
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assert((Res & 3) == 0 && "lowest 2 bits are non-zero");
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return Res >> 2;
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}
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void LoongArchMCCodeEmitter::encodeInstruction(
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const MCInst &MI, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const {
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const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
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// Get byte count of instruction.
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unsigned Size = Desc.getSize();
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switch (Size) {
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default:
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llvm_unreachable("Unhandled encodeInstruction length!");
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case 4: {
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uint32_t Bits = getBinaryCodeForInstr(MI, Fixups, STI);
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support::endian::write(OS, Bits, support::little);
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break;
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}
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}
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}
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MCCodeEmitter *llvm::createLoongArchMCCodeEmitter(const MCInstrInfo &MCII,
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MCContext &Ctx) {
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return new LoongArchMCCodeEmitter(Ctx, MCII);
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}
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#include "LoongArchGenMCCodeEmitter.inc"
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