338 lines
10 KiB
LLVM
338 lines
10 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple aarch64-apple-darwin | FileCheck %s
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define <4 x double> @test_ldnp_v4f64(<4 x double>* %A) {
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; CHECK-LABEL: test_ldnp_v4f64:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldnp q0, q1, [x0]
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; CHECK-NEXT: ret
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%lv = load <4 x double>, <4 x double>* %A, align 8, !nontemporal !0
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ret <4 x double> %lv
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}
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define <4 x i64> @test_ldnp_v4i64(<4 x i64>* %A) {
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; CHECK-LABEL: test_ldnp_v4i64:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldnp q0, q1, [x0]
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; CHECK-NEXT: ret
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%lv = load <4 x i64>, <4 x i64>* %A, align 8, !nontemporal !0
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ret <4 x i64> %lv
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}
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define <8 x i32> @test_ldnp_v8i32(<8 x i32>* %A) {
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; CHECK-LABEL: test_ldnp_v8i32:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldnp q0, q1, [x0]
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; CHECK-NEXT: ret
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%lv = load <8 x i32>, <8 x i32>* %A, align 8, !nontemporal !0
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ret <8 x i32> %lv
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}
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define <8 x float> @test_ldnp_v8f32(<8 x float>* %A) {
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; CHECK-LABEL: test_ldnp_v8f32:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldnp q0, q1, [x0]
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; CHECK-NEXT: ret
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%lv = load <8 x float>, <8 x float>* %A, align 8, !nontemporal !0
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ret <8 x float> %lv
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}
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define <16 x i16> @test_ldnp_v16i16(<16 x i16>* %A) {
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; CHECK-LABEL: test_ldnp_v16i16:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldnp q0, q1, [x0]
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; CHECK-NEXT: ret
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%lv = load <16 x i16>, <16 x i16>* %A, align 8, !nontemporal !0
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ret <16 x i16> %lv
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}
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define <16 x half> @test_ldnp_v16f16(<16 x half>* %A) {
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; CHECK-LABEL: test_ldnp_v16f16:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldnp q0, q1, [x0]
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; CHECK-NEXT: ret
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%lv = load <16 x half>, <16 x half>* %A, align 8, !nontemporal !0
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ret <16 x half> %lv
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}
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define <32 x i8> @test_ldnp_v32i8(<32 x i8>* %A) {
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; CHECK-LABEL: test_ldnp_v32i8:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldnp q0, q1, [x0]
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; CHECK-NEXT: ret
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%lv = load <32 x i8>, <32 x i8>* %A, align 8, !nontemporal !0
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ret <32 x i8> %lv
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}
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define <4 x i32> @test_ldnp_v4i32(<4 x i32>* %A) {
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; CHECK-LABEL: test_ldnp_v4i32:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldr q0, [x0]
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; CHECK-NEXT: ret
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%lv = load<4 x i32>, <4 x i32>* %A, align 8, !nontemporal !0
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ret <4 x i32> %lv
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}
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define <4 x float> @test_ldnp_v4f32(<4 x float>* %A) {
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; CHECK-LABEL: test_ldnp_v4f32:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldr q0, [x0]
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; CHECK-NEXT: ret
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%lv = load<4 x float>, <4 x float>* %A, align 8, !nontemporal !0
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ret <4 x float> %lv
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}
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define <8 x i16> @test_ldnp_v8i16(<8 x i16>* %A) {
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; CHECK-LABEL: test_ldnp_v8i16:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldr q0, [x0]
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; CHECK-NEXT: ret
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%lv = load <8 x i16>, <8 x i16>* %A, align 8, !nontemporal !0
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ret <8 x i16> %lv
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}
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define <16 x i8> @test_ldnp_v16i8(<16 x i8>* %A) {
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; CHECK-LABEL: test_ldnp_v16i8:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldr q0, [x0]
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; CHECK-NEXT: ret
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%lv = load <16 x i8>, <16 x i8>* %A, align 8, !nontemporal !0
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ret <16 x i8> %lv
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}
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define <2 x double> @test_ldnp_v2f64(<2 x double>* %A) {
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; CHECK-LABEL: test_ldnp_v2f64:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldr q0, [x0]
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; CHECK-NEXT: ret
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%lv = load <2 x double>, <2 x double>* %A, align 8, !nontemporal !0
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ret <2 x double> %lv
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}
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define <2 x i32> @test_ldnp_v2i32(<2 x i32>* %A) {
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; CHECK-LABEL: test_ldnp_v2i32:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldr d0, [x0]
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; CHECK-NEXT: ret
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%lv = load <2 x i32>, <2 x i32>* %A, align 8, !nontemporal !0
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ret <2 x i32> %lv
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}
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define <2 x float> @test_ldnp_v2f32(<2 x float>* %A) {
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; CHECK-LABEL: test_ldnp_v2f32:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldr d0, [x0]
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; CHECK-NEXT: ret
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%lv = load <2 x float>, <2 x float>* %A, align 8, !nontemporal !0
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ret <2 x float> %lv
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}
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define <4 x i16> @test_ldnp_v4i16(<4 x i16>* %A) {
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; CHECK-LABEL: test_ldnp_v4i16:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldr d0, [x0]
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; CHECK-NEXT: ret
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%lv = load <4 x i16>, <4 x i16>* %A, align 8, !nontemporal !0
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ret <4 x i16> %lv
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}
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define <8 x i8> @test_ldnp_v8i8(<8 x i8>* %A) {
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; CHECK-LABEL: test_ldnp_v8i8:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldr d0, [x0]
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; CHECK-NEXT: ret
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%lv = load <8 x i8>, <8 x i8>* %A, align 8, !nontemporal !0
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ret <8 x i8> %lv
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}
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define <1 x double> @test_ldnp_v1f64(<1 x double>* %A) {
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; CHECK-LABEL: test_ldnp_v1f64:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldr d0, [x0]
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; CHECK-NEXT: ret
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%lv = load <1 x double>, <1 x double>* %A, align 8, !nontemporal !0
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ret <1 x double> %lv
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}
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define <1 x i64> @test_ldnp_v1i64(<1 x i64>* %A) {
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; CHECK-LABEL: test_ldnp_v1i64:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldr d0, [x0]
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; CHECK-NEXT: ret
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%lv = load <1 x i64>, <1 x i64>* %A, align 8, !nontemporal !0
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ret <1 x i64> %lv
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}
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define <32 x i16> @test_ldnp_v32i16(<32 x i16>* %A) {
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; CHECK-LABEL: test_ldnp_v32i16:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldnp q0, q1, [x0]
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; CHECK-NEXT: ldnp q2, q3, [x0, #32]
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; CHECK-NEXT: ret
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%lv = load <32 x i16>, <32 x i16>* %A, align 8, !nontemporal !0
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ret <32 x i16> %lv
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}
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define <32 x half> @test_ldnp_v32f16(<32 x half>* %A) {
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; CHECK-LABEL: test_ldnp_v32f16:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldnp q0, q1, [x0]
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; CHECK-NEXT: ldnp q2, q3, [x0, #32]
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; CHECK-NEXT: ret
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%lv = load <32 x half>, <32 x half>* %A, align 8, !nontemporal !0
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ret <32 x half> %lv
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}
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define <16 x i32> @test_ldnp_v16i32(<16 x i32>* %A) {
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; CHECK-LABEL: test_ldnp_v16i32:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldnp q0, q1, [x0]
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; CHECK-NEXT: ldnp q2, q3, [x0, #32]
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; CHECK-NEXT: ret
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%lv = load <16 x i32>, <16 x i32>* %A, align 8, !nontemporal !0
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ret <16 x i32> %lv
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}
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define <16 x float> @test_ldnp_v16f32(<16 x float>* %A) {
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; CHECK-LABEL: test_ldnp_v16f32:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldnp q0, q1, [x0]
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; CHECK-NEXT: ldnp q2, q3, [x0, #32]
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; CHECK-NEXT: ret
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%lv = load <16 x float>, <16 x float>* %A, align 8, !nontemporal !0
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ret <16 x float> %lv
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}
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define <17 x float> @test_ldnp_v17f32(<17 x float>* %A) {
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; CHECK-LABEL: test_ldnp_v17f32:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldp q1, q2, [x0, #32]
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; CHECK-NEXT: ldp q3, q4, [x0]
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; CHECK-NEXT: ldr s0, [x0, #64]
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; CHECK-NEXT: stp q3, q4, [x8]
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; CHECK-NEXT: stp q1, q2, [x8, #32]
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; CHECK-NEXT: str s0, [x8, #64]
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; CHECK-NEXT: ret
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%lv = load <17 x float>, <17 x float>* %A, align 8, !nontemporal !0
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ret <17 x float> %lv
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}
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define <33 x double> @test_ldnp_v33f64(<33 x double>* %A) {
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; CHECK-LABEL: test_ldnp_v33f64:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldp q0, q1, [x0]
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; CHECK-NEXT: ldp q2, q3, [x0, #32]
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; CHECK-NEXT: ldp q4, q5, [x0, #64]
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; CHECK-NEXT: ldp q6, q7, [x0, #96]
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; CHECK-NEXT: ldp q16, q17, [x0, #128]
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; CHECK-NEXT: ldp q18, q19, [x0, #160]
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; CHECK-NEXT: ldp q21, q22, [x0, #224]
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; CHECK-NEXT: ldp q23, q24, [x0, #192]
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; CHECK-NEXT: ldr d20, [x0, #256]
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; CHECK-NEXT: stp q0, q1, [x8]
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; CHECK-NEXT: stp q2, q3, [x8, #32]
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; CHECK-NEXT: stp q4, q5, [x8, #64]
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; CHECK-NEXT: str d20, [x8, #256]
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; CHECK-NEXT: stp q6, q7, [x8, #96]
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; CHECK-NEXT: stp q16, q17, [x8, #128]
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; CHECK-NEXT: stp q18, q19, [x8, #160]
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; CHECK-NEXT: stp q23, q24, [x8, #192]
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; CHECK-NEXT: stp q21, q22, [x8, #224]
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; CHECK-NEXT: ret
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%lv = load <33 x double>, <33 x double>* %A, align 8, !nontemporal !0
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ret <33 x double> %lv
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}
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define <33 x i8> @test_ldnp_v33i8(<33 x i8>* %A) {
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; CHECK-LABEL: test_ldnp_v33i8:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldp q1, q0, [x0]
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; CHECK-NEXT: ldrb w9, [x0, #32]
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; CHECK-NEXT: stp q1, q0, [x8]
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; CHECK-NEXT: strb w9, [x8, #32]
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; CHECK-NEXT: ret
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%lv = load<33 x i8>, <33 x i8>* %A, align 8, !nontemporal !0
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ret <33 x i8> %lv
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}
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define <4 x i65> @test_ldnp_v4i65(<4 x i65>* %A) {
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; CHECK-LABEL: test_ldnp_v4i65:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldp x8, x9, [x0, #8]
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; CHECK-NEXT: ldr d0, [x0]
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; CHECK-NEXT: ldr x10, [x0, #24]
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; CHECK-NEXT: and x1, x8, #0x1
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; CHECK-NEXT: ldrb w11, [x0, #32]
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; CHECK-NEXT: extr x2, x9, x8, #1
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; CHECK-NEXT: extr x4, x10, x9, #2
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; CHECK-NEXT: extr x6, x11, x10, #3
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; CHECK-NEXT: ubfx x3, x9, #1, #1
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; CHECK-NEXT: mov.d v0[1], x1
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; CHECK-NEXT: ubfx x5, x10, #2, #1
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; CHECK-NEXT: ubfx x7, x11, #3, #1
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; CHECK-NEXT: fmov x0, d0
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; CHECK-NEXT: ret
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%lv = load <4 x i65>, <4 x i65>* %A, align 8, !nontemporal !0
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ret <4 x i65> %lv
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}
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define <4 x i63> @test_ldnp_v4i63(<4 x i63>* %A) {
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; CHECK-LABEL: test_ldnp_v4i63:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldp x8, x9, [x0]
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; CHECK-NEXT: ldp x10, x11, [x0, #16]
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; CHECK-NEXT: extr x12, x9, x8, #63
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; CHECK-NEXT: and x0, x8, #0x7fffffffffffffff
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; CHECK-NEXT: extr x9, x10, x9, #62
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; CHECK-NEXT: extr x10, x11, x10, #61
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; CHECK-NEXT: and x1, x12, #0x7fffffffffffffff
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; CHECK-NEXT: and x2, x9, #0x7fffffffffffffff
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; CHECK-NEXT: and x3, x10, #0x7fffffffffffffff
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; CHECK-NEXT: ret
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%lv = load <4 x i63>, <4 x i63>* %A, align 8, !nontemporal !0
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ret <4 x i63> %lv
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}
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define <5 x double> @test_ldnp_v5f64(<5 x double>* %A) {
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; CHECK-LABEL: test_ldnp_v5f64:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldp q0, q2, [x0]
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; CHECK-NEXT: ext.16b v1, v0, v0, #8
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; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0
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; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q1
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; CHECK-NEXT: ext.16b v3, v2, v2, #8
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; CHECK-NEXT: ldr d4, [x0, #32]
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; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q2
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; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q3
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; CHECK-NEXT: ; kill: def $d4 killed $d4 killed $q4
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; CHECK-NEXT: ret
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%lv = load<5 x double>, <5 x double>* %A, align 8, !nontemporal !0
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ret <5 x double> %lv
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}
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define <16 x i64> @test_ldnp_v16i64(<16 x i64>* %A) {
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; CHECK-LABEL: test_ldnp_v16i64:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldnp q0, q1, [x0]
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; CHECK-NEXT: ldnp q2, q3, [x0, #32]
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; CHECK-NEXT: ldnp q4, q5, [x0, #64]
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; CHECK-NEXT: ldnp q6, q7, [x0, #96]
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; CHECK-NEXT: ret
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%lv = load <16 x i64>, <16 x i64>* %A, align 8, !nontemporal !0
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ret <16 x i64> %lv
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}
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define <16 x double> @test_ldnp_v16f64(<16 x double>* %A) {
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; CHECK-LABEL: test_ldnp_v16f64:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldnp q0, q1, [x0]
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; CHECK-NEXT: ldnp q2, q3, [x0, #32]
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; CHECK-NEXT: ldnp q4, q5, [x0, #64]
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; CHECK-NEXT: ldnp q6, q7, [x0, #96]
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; CHECK-NEXT: ret
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%lv = load <16 x double>, <16 x double>* %A, align 8, !nontemporal !0
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ret <16 x double> %lv
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}
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!0 = !{i32 1}
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