a560e57a7e
R1 is a reserved register, but LLVM gives the APIs to know when it is used or not. So this patch uses these APIs to only save/clear/restore R1 in interrupts when necessary. The main issue here was getting inline assembly to work. One could argue that this is the job of Clang, but for consistency I've made sure that R1 is always usable in inline assembly even if that means clearing it when it might not be needed. Information on inline assembly in AVR can be found here: https://www.nongnu.org/avr-libc/user-manual/inline_asm.html#asm_code Essentially, this seems to suggest that r1 can be freely used in avr-gcc inline assembly, even without specifying it as an input operand. Differential Revision: https://reviews.llvm.org/D117426 |
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| .. | ||
| ADCWRdRr.mir | ||
| ADDWRdRr.mir | ||
| ANDIWRdK.mir | ||
| ANDWRdRr.mir | ||
| ASRBNRd.mir | ||
| ASRWNRd.mir | ||
| ASRWRd.mir | ||
| COMWRd.mir | ||
| COPY.mir | ||
| CPCWRdRr.mir | ||
| CPWRdRr.mir | ||
| EORWRdRr.mir | ||
| FRMIDX.mir | ||
| INWRdA.mir | ||
| LDDWRdPtrQ.mir | ||
| LDDWRdYQ.mir | ||
| LDIWRdK.mir | ||
| LDSWRdK.mir | ||
| LDWRdPtr.mir | ||
| LDWRdPtrPd.mir | ||
| LDWRdPtrPi.mir | ||
| LSLBNRd.mir | ||
| LSLWNRd.mir | ||
| LSLWRd.mir | ||
| LSRBNRd.mir | ||
| LSRWNRd.mir | ||
| LSRWRd.mir | ||
| NEGWRd.mir | ||
| ORIWRdK.mir | ||
| ORWRdRr.mir | ||
| OUTWARr.mir | ||
| POPWRd.mir | ||
| PUSHWRr.mir | ||
| ROLBrd.mir | ||
| SBCIWRdK.mir | ||
| SBCWRdRr.mir | ||
| SEXT.mir | ||
| STDWPtrQRr.mir | ||
| STSWKRr.mir | ||
| STWPtrPdRr.mir | ||
| STWPtrPiRr.mir | ||
| STWPtrRr.mir | ||
| SUBIWRdK.mir | ||
| SUBWRdRr.mir | ||
| ZEXT.mir | ||