..
AMX
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AlignedBundling
[NFC][llvm] Inclusive language: reword uses of sanity test and check
2021-11-25 07:21:42 -05:00
Inputs
[X86] Add test showing binary differences with -x86-pad-for-align.
2021-06-17 12:27:17 +01:00
KEYLOCKER
[X86] Support Intel Key Locker
2020-09-30 18:08:45 +08:00
3DNow.s
…
2011-09-06-NoNewline.s
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AES-32.s
…
AES-64.s
…
AVX-32.s
…
AVX-64.s
…
AVX2-32.s
…
AVX2-64.s
…
AVX512F_512-32.s
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AVX512F_512-64.s
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AVX512F_SCALAR-32.s
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AVX512F_SCALAR-64.s
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AVXAES-32.s
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AVXAES-64.s
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BMI1-32.s
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BMI1-64.s
…
BMI2-32.s
…
BMI2-64.s
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CET-32.s
…
CET-64.s
…
CLFLUSHOPT-32.s
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CLFLUSHOPT-64.s
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CLFSH-32.s
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CLFSH-64.s
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CLWB-32.s
…
CLWB-64.s
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CLZERO-32.s
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CLZERO-64.s
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F16C-32.s
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F16C-64.s
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FMA-32.s
…
FMA-64.s
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FXSAVE-32.s
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FXSAVE-64.s
…
FXSAVE64-64.s
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I86-32.s
[X86] Emit REX prefix immediately before the opcode
2022-03-16 08:30:31 -07:00
I86-64.s
[X86] Emit REX prefix immediately before the opcode
2022-03-16 08:30:31 -07:00
I186-32.s
[X86] Emit REX prefix immediately before the opcode
2022-03-16 08:30:31 -07:00
I186-64.s
[X86] Emit REX prefix immediately before the opcode
2022-03-16 08:30:31 -07:00
I286-32.s
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I286-64.s
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I386-32.s
[X86] Emit REX prefix immediately before the opcode
2022-03-16 08:30:31 -07:00
I386-64.s
[X86] Emit REX prefix immediately before the opcode
2022-03-16 08:30:31 -07:00
I486-32.s
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I486-64.s
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INVPCID-32.s
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INVPCID-64.s
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LWP-32.s
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LWP-64.s
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MMX-32.s
…
MMX-64.s
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PKU-32.s
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PKU-64.s
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POPCNT-32.s
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POPCNT-64.s
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PPRO-32.s
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PPRO-64.s
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PREFETCH-32.s
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PREFETCH-64.s
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RDPMC-32.s
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RDPMC-64.s
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RDPRU.s
[X86] Add RDPRU instruction
2022-07-06 07:17:47 -07:00
RDRAND-32.s
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RDRAND-64.s
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RDSEED-32.s
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RDSEED-64.s
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RDTSCP-32.s
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RDTSCP-64.s
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RDWRFSGS-64.s
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RTM.s
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SHA-32.s
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SHA-64.s
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SNP-32.s
[X86] Add TLBSYNC, INVLPGB and SNP instructions
2021-01-08 22:28:53 +05:30
SNP-64.s
[X86] Add TLBSYNC, INVLPGB and SNP instructions
2021-01-08 22:28:53 +05:30
SSE-32.s
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SSE-64.s
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SSE2-32.s
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SSE2-64.s
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SSE3-32.s
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SSE3-64.s
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SSE4a-32.s
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SSE4a-64.s
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SSE41-32.s
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SSE41-64.s
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SSE42-32.s
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SSE42-64.s
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SSEMXCSR-32.s
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SSEMXCSR-64.s
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SSE_PREFETCH-32.s
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SSE_PREFETCH-64.s
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SSSE3-32.s
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SSSE3-64.s
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SVM-32.s
[X86] Teach assembler to accept vmsave/vmload/vmrun/invlpga/skinit with or without the fixed register operands
2020-12-19 11:01:55 -08:00
SVM-64.s
[X86] Teach assembler to accept vmsave/vmload/vmrun/invlpga/skinit with or without the fixed register operands
2020-12-19 11:01:55 -08:00
VMFUNC-32.s
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VMFUNC-64.s
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VTX-32.s
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VTX-64.s
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X86_64-pku.s
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X87-32.s
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X87-64.s
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XOP-32.s
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XOP-64.s
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XSAVE-32.s
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XSAVE-64.s
…
XSAVEC-32.s
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XSAVEC-64.s
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XSAVEOPT-32.s
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XSAVEOPT-64.s
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XSAVES-32.s
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XSAVES-64.s
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abs8.s
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addr16-32.s
[X86] Add segment and address-size override prefixes
2021-01-19 23:54:31 -08:00
address-size.s
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align-branch-32bit.s
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align-branch-align.s
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align-branch-basic.s
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align-branch-boundary-default.s
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align-branch-bundle.s
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align-branch-enhanced-relaxation.s
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align-branch-fused.s
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align-branch-general.s
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align-branch-hardcode.s
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align-branch-mixed.s
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align-branch-necessary.s
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align-branch-negative.s
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align-branch-pad-max-prefix.s
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align-branch-prefix.s
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align-branch-relax-all.s
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align-branch-section-size.s
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align-branch-section-type.s
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align-branch-single.s
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align-branch-system.s
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align-branch-variant-symbol.s
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align-via-padding-corner.s
[X86] Default to -x86-pad-for-align=false to drop assembler difference with or w/o -g
2021-01-16 16:39:54 -08:00
align-via-padding.s
[X86] Default to -x86-pad-for-align=false to drop assembler difference with or w/o -g
2021-01-16 16:39:54 -08:00
align-via-relaxation.s
[X86] Default to -x86-pad-for-align=false to drop assembler difference with or w/o -g
2021-01-16 16:39:54 -08:00
avx512-encodings.s
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avx512-err.s
[X86] Prevent accidentally accepting cmpeqsh as a valid mnemonic.
2021-08-15 12:00:56 -07:00
avx512_bf16-encoding.s
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avx512_bf16_vl-encoding.s
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avx512bitalg-encoding.s
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avx512bw-encoding.s
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avx512fp16-complex-fma.s
[X86] AVX512FP16 instructions enabling 6/6
2021-08-30 13:08:45 +08:00
avx512fp16-complex-fma_vl.s
[X86] AVX512FP16 instructions enabling 6/6
2021-08-30 13:08:45 +08:00
avx512fp16.s
[X86][MC] Avoid emitting incorrect warning for complex FMUL
2022-07-28 13:58:34 +08:00
avx512fp16vl.s
[X86] AVX512FP16 instructions enabling 6/6
2021-08-30 13:08:45 +08:00
avx512gfni-encoding.s
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avx512ifma-encoding.s
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avx512ifmavl-encoding.s
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avx512vaes-encoding.s
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avx512vbmi-encoding.s
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avx512vbmi2-encoding.s
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avx512vbmi2vl-encoding.s
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avx512vl-encoding.s
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avx512vl_bitalg-encoding.s
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avx512vl_gfni-encoding.s
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avx512vl_vaes-encoding.s
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avx512vl_vnni-encoding.s
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avx512vlvpclmul.s
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avx512vnni-encoding.s
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avx512vp2intersectvl-att.s
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avx512vp2intersectvl-intel.s
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avx512vpclmul.s
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avx5124fmaps-encoding.s
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avx5124vnniw-encoding.s
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avx_vaes-encoding.s
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avx_vnni-encoding.s
[X86] Support Intel avxvnni
2020-10-31 12:39:51 +08:00
cet-encoding.s
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cfi_offset-eip.s
[MC][test] Reorganize .cfi_* tests
2020-12-21 17:18:28 -08:00
check-end-of-data-region.s
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code16-32-64.s
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code16gcc-align.s
[X86] Use correct padding when in 16-bit mode
2021-02-25 20:05:45 -08:00
code16gcc.s
[X86] Emit REX prefix immediately before the opcode
2022-03-16 08:30:31 -07:00
compact-unwind-cfi_def_cfa.s
[MC][NFC] Ensure tests that intended to cover compact unwind code paths do so
2022-04-20 18:11:33 -04:00
compact-unwind-mode-dwarf.s
[MC][re-land] Omit DWARF unwind info if compact unwind is present where eligible
2022-06-12 17:24:19 -04:00
compact-unwind.s
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crlf.test
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data-prefix-fail.s
[X86] .code16: temporarily set Mode32Bit when matching an instruction with the data32 prefix
2020-10-06 08:32:03 -07:00
data-prefix16.s
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data-prefix32.s
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data-prefix64.s
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directive-arch.s
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disassemble-zeroes.s
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dwarf-size-field-overflow.test
[DebugInfo] Bug 41152 - Improve dumping of empty location expressions
2021-06-29 09:21:00 +01:00
encoder-fail.s
[X86] Remove period from end of error message in assembler
2020-10-21 00:43:23 -07:00
error-reloc.s
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eval-fill.s
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faultmap-section-parsing.s
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fixup-cpu-mode.s
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fp-setup-macho.s
[MC][NFC] Ensure tests that intended to cover compact unwind code paths do so
2022-04-20 18:11:33 -04:00
gather.s
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gfni-encoding.s
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gnux32-dwarf-gen.s
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gotpcrel_norelax.s
[X86] Selective relocation relaxation for +tagged-globals
2021-11-19 07:18:27 -08:00
gotpcrelx.s
[X86] Avoid generating invalid R_X86_64_GOTPCRELX relocations
2020-12-18 23:38:38 +00:00
hex-immediates.s
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i386-darwin-frame-register.ll
Show register names in DWARF unwind info.
2020-10-05 15:34:33 -07:00
imm-comments.s
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index-operations.s
[X86] Emit REX prefix immediately before the opcode
2022-03-16 08:30:31 -07:00
inline-asm-obj.ll
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intel-syntax-2.s
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intel-syntax-32.s
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intel-syntax-ambiguous.s
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intel-syntax-avx512-error.s
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intel-syntax-avx512.s
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intel-syntax-avx512_bf16.s
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intel-syntax-avx512_bf16_vl.s
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intel-syntax-avx512fp16.s
[X86] AVX512FP16 instructions enabling 6/6
2021-08-30 13:08:45 +08:00
intel-syntax-avx512fp16vl.s
[X86] AVX512FP16 instructions enabling 6/6
2021-08-30 13:08:45 +08:00
intel-syntax-avx_vnni.s
[X86] Support Intel avxvnni
2020-10-31 12:39:51 +08:00
intel-syntax-bitwise-ops.s
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intel-syntax-directional-label.s
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intel-syntax-encoding.s
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intel-syntax-error.s
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intel-syntax-hex.s
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intel-syntax-invalid-basereg.s
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intel-syntax-invalid-scale.s
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intel-syntax-print.ll
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intel-syntax-ptr-sized.s
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intel-syntax-unsized-memory.s
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intel-syntax-var-offset.ll
[test] Add explicit dso_local to definitions in ELF static relocation model tests
2020-12-30 15:47:16 -08:00
intel-syntax-x86-64-avx.s
[X86] Accept 64-bit GPRs for vextractps when using a register that requires EVEX.
2021-02-01 11:01:32 -08:00
intel-syntax-x86-64-avx512_bf16.s
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intel-syntax-x86-64-avx512_bf16_vl.s
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intel-syntax-x86-64-avx512f_vl.s
[X86] Accept 64-bit GPRs for vextractps when using a register that requires EVEX.
2021-02-01 11:01:32 -08:00
intel-syntax-x86-64-avx_vnni.s
[X86] Support Intel avxvnni
2020-10-31 12:39:51 +08:00
intel-syntax-x86-avx512dq_vl.s
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intel-syntax-x86-avx512vbmi_vl.s
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intel-syntax.s
Fix misspelled instruction in X86 assembly parser
2021-06-13 18:34:15 -04:00
invalid-sleb.s
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invalid_opcode.s
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large-bss.s
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line-table-sections.s
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lit.local.cfg
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lwp-x86_64.s
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lwp.s
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macho-reloc-errors-x86.s
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macho-reloc-errors-x86_64.s
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macho-uleb.s
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maskmovdqu.s
[X86] Fix handling of maskmovdqu in X32
2021-07-15 22:56:08 +01:00
maskmovdqu64.s
[X86] Fix handling of maskmovdqu in X32
2021-07-15 22:56:08 +01:00
no-elf-compact-unwind.s
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pad-for-align-debug.s
[X86] Check using default in test added in 0bd5bbb31e
.
2021-06-17 13:19:43 +01:00
padlock.s
[X86] Don't add implicit REP prefix to VIA PadLock xstore
2021-10-23 01:57:17 +01:00
pltoff.s
[X86] Support modifier @PLTOFF for R_X86_64_PLTOFF64
2020-12-01 08:39:01 -08:00
pr22004.s
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pr22028.s
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pr27884.s
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pr28547.s
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pr32530.s
[llvm] Replace tab with spaces in one test
2021-09-23 15:34:01 -04:00
pr37425.s
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prefix-padding-32.s
[X86] Default to -x86-pad-for-align=false to drop assembler difference with or w/o -g
2021-01-16 16:39:54 -08:00
prefix-padding-64.s
[X86] Default to -x86-pad-for-align=false to drop assembler difference with or w/o -g
2021-01-16 16:39:54 -08:00
relax-insn.s
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relax-offset.s
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reloc-directive-elf-32.s
[MC][test] Fix reloc-directive-elf-*.s
2021-03-05 21:37:29 -08:00
reloc-directive-elf-64.s
[MC][test] Fix reloc-directive-elf-*.s
2021-03-05 21:37:29 -08:00
reloc-directive.s
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reloc-macho.s
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reloc-undef-global.s
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ret.s
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segment-prefix.s
[X86] Add segment and address-size override prefixes
2021-01-19 23:54:31 -08:00
shuffle-comments.s
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signed-coff-pcrel.s
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space-err.s
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stackmap-nops.ll
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stdcall.s
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tlsdesc-32.s
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tlsdesc-64.s
[llvm-objdump] Prefix memory operand addresses with '0x'
2021-06-28 14:25:21 +07:00
tlsdesc-x32.s
[llvm-objdump] Prefix memory operand addresses with '0x'
2021-06-28 14:25:21 +07:00
unused_reg_var_assign.s
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validate-inst-att.s
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validate-inst-intel.s
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variant-diagnostics.s
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vpclmulqdq.s
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x86-16.s
[X86] Emit REX prefix immediately before the opcode
2022-03-16 08:30:31 -07:00
x86-32-avx.s
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x86-32-avx512_vp2intersect-intel.s
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x86-32-avx512vp2intersect-att.s
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x86-32-coverage.s
[X86] Add TLBSYNC, INVLPGB and SNP instructions
2021-01-08 22:28:53 +05:30
x86-32-fma3.s
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x86-32-ms-inline-asm.s
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x86-32.s
[X86] Add TLBSYNC, INVLPGB and SNP instructions
2021-01-08 22:28:53 +05:30
x86-64-avx512_bf16-encoding.s
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x86-64-avx512_bf16_vl-encoding.s
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x86-64-avx512_vp2intersect-intel.s
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x86-64-avx512bw.s
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x86-64-avx512bw_vl.s
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x86-64-avx512cd.s
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x86-64-avx512cd_vl.s
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x86-64-avx512dq.s
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x86-64-avx512dq_vl.s
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x86-64-avx512f_vl.s
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x86-64-avx512pf.s
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x86-64-avx512vp2intersect-att.s
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x86-64-avx512vp2intersectvl-att.s
…
x86-64-avx512vp2intersectvl-intel.s
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x86-64-avx512vpopcntdq.s
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x86-64-avx_vnni-encoding.s
[X86] Support Intel avxvnni
2020-10-31 12:39:51 +08:00
x86-64.s
[X86] Add TLBSYNC, INVLPGB and SNP instructions
2021-01-08 22:28:53 +05:30
x86-GCC-inline-asm-Y-constraints.ll
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x86-branch-relaxation.s
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x86-directive-nops-errors.s
[X86] Introduce more common modern tunings into `generic`
2022-02-05 10:31:30 +08:00
x86-directive-nops.s
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x86-evenDirective.s
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x86-itanium.ll
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x86-jcxz-loop-fixup.s
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x86-target-directives.s
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x86-windows-itanium-libcalls.ll
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x86_64-asm-match.s
Reland "Reland "Reland "Reland "[X86][RFC] Enable `_Float16` type support on X86 following the psABI""""
2022-06-17 21:34:05 +08:00
x86_64-avx-clmul-encoding.s
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x86_64-avx-encoding.s
[X86][test] Add encoding/decoding tests for VEX instruction w/ address-size prefix
2022-04-13 12:50:25 +08:00
x86_64-bmi-encoding.s
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x86_64-directive-nops.s
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x86_64-encoding.s
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x86_64-fma3-encoding.s
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x86_64-fma4-encoding.s
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x86_64-hle-encoding.s
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x86_64-imm-widths.s
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x86_64-rand-encoding.s
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x86_64-rtm-encoding.s
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x86_64-signed-reloc.s
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x86_64-sse4a.s
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x86_64-tbm-encoding.s
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x86_64-xop-encoding.s
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x86_directives.s
…
x86_errors.s
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x86_long_nop.s
[X86] Update tests for znver3
2021-01-07 11:51:50 +05:30
x86_nop.s
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x86_operands.s
…