130 lines
4.9 KiB
TableGen
130 lines
4.9 KiB
TableGen
//- WebAssembly.td - Describe the WebAssembly Target Machine --*- tablegen -*-//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This is a target description file for the WebAssembly architecture,
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/// which is also known as "wasm".
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///
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Target-independent interfaces which we are implementing
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//===----------------------------------------------------------------------===//
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include "llvm/Target/Target.td"
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//===----------------------------------------------------------------------===//
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// WebAssembly Subtarget features.
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//===----------------------------------------------------------------------===//
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def FeatureSIMD128 : SubtargetFeature<"simd128", "SIMDLevel", "SIMD128",
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"Enable 128-bit SIMD">;
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def FeatureRelaxedSIMD : SubtargetFeature<"relaxed-simd", "SIMDLevel", "RelaxedSIMD",
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"Enable relaxed-simd instructions">;
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def FeatureAtomics : SubtargetFeature<"atomics", "HasAtomics", "true",
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"Enable Atomics">;
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def FeatureNontrappingFPToInt :
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SubtargetFeature<"nontrapping-fptoint",
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"HasNontrappingFPToInt", "true",
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"Enable non-trapping float-to-int conversion operators">;
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def FeatureSignExt :
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SubtargetFeature<"sign-ext",
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"HasSignExt", "true",
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"Enable sign extension operators">;
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def FeatureTailCall :
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SubtargetFeature<"tail-call",
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"HasTailCall", "true",
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"Enable tail call instructions">;
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def FeatureExceptionHandling :
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SubtargetFeature<"exception-handling", "HasExceptionHandling", "true",
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"Enable Wasm exception handling">;
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def FeatureBulkMemory :
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SubtargetFeature<"bulk-memory", "HasBulkMemory", "true",
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"Enable bulk memory operations">;
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def FeatureMultivalue :
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SubtargetFeature<"multivalue",
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"HasMultivalue", "true",
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"Enable multivalue blocks, instructions, and functions">;
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def FeatureMutableGlobals :
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SubtargetFeature<"mutable-globals", "HasMutableGlobals", "true",
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"Enable mutable globals">;
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def FeatureReferenceTypes :
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SubtargetFeature<"reference-types", "HasReferenceTypes", "true",
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"Enable reference types">;
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def FeatureExtendedConst :
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SubtargetFeature<"extended-const", "HasExtendedConst", "true",
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"Enable extended const expressions">;
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//===----------------------------------------------------------------------===//
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// Architectures.
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Register File Description
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//===----------------------------------------------------------------------===//
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include "WebAssemblyRegisterInfo.td"
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//===----------------------------------------------------------------------===//
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// Instruction Descriptions
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//===----------------------------------------------------------------------===//
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include "WebAssemblyInstrInfo.td"
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def WebAssemblyInstrInfo : InstrInfo;
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//===----------------------------------------------------------------------===//
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// WebAssembly Processors supported.
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//===----------------------------------------------------------------------===//
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// Minimal Viable Product.
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def : ProcessorModel<"mvp", NoSchedModel, []>;
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// Generic processor: latest stable version.
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def : ProcessorModel<"generic", NoSchedModel, []>;
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// Latest and greatest experimental version of WebAssembly. Bugs included!
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def : ProcessorModel<"bleeding-edge", NoSchedModel,
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[FeatureSIMD128, FeatureAtomics,
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FeatureNontrappingFPToInt, FeatureSignExt,
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FeatureMutableGlobals, FeatureBulkMemory,
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FeatureTailCall]>;
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//===----------------------------------------------------------------------===//
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// Target Declaration
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//===----------------------------------------------------------------------===//
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def WebAssemblyAsmParser : AsmParser {
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// The physical register names are not in the binary format or asm text
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let ShouldEmitMatchRegisterName = 0;
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}
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def WebAssemblyAsmWriter : AsmWriter {
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string AsmWriterClassName = "InstPrinter";
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int PassSubtarget = 0;
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int Variant = 0;
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bit isMCAsmWriter = 1;
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}
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def WebAssembly : Target {
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let InstructionSet = WebAssemblyInstrInfo;
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let AssemblyParsers = [WebAssemblyAsmParser];
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let AssemblyWriters = [WebAssemblyAsmWriter];
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}
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