llvm-project/llvm/lib/Transforms/InstCombine
Sanjay Patel bfde861935 [InstCombine] convert mask and shift of power-of-2 to cmp+select
When the mask is a power-of-2 constant and op0 is a shifted-power-of-2
constant, test if the shift amount equals the offset bit index:

(ShiftC << X) & C --> X == (log2(C) - log2(ShiftC)) ? C : 0
(ShiftC >> X) & C --> X == (log2(ShiftC) - log2(C)) ? C : 0

This is an alternate to D127610 with a more general pattern.
We match only shift+and instead of the trailing xor, so we see a few
more tests diffs. I think we discussed this initially in D126617.

Here are proofs for shifts in both directions:
https://alive2.llvm.org/ce/z/CFrLs4

The test diffs look equal or better for IR, and this makes the
patterns more uniform in IR. The backend can partially invert this
in both cases if that is profitable. It is not trivially reversible,
however, so if we find perf regressions that are not easy to undo,
then we may want to revert this.

Differential Revision: https://reviews.llvm.org/D127801
2022-06-17 10:51:57 -04:00
..
CMakeLists.txt
InstCombineAddSub.cpp [NFC] format InstructionSimplify & lowerCaseFunctionNames 2022-06-09 16:10:08 +02:00
InstCombineAndOrXor.cpp [InstCombine] convert mask and shift of power-of-2 to cmp+select 2022-06-17 10:51:57 -04:00
InstCombineAtomicRMW.cpp Cleanup includes: Transform/Scalar 2022-03-03 07:56:34 +01:00
InstCombineCalls.cpp [NFC][Alignment] Simplify code 2022-06-10 15:25:28 +00:00
InstCombineCasts.cpp [InstCombine] decomposeSimpleLinearExpr should bail out on negative operands. 2022-06-08 00:57:25 +00:00
InstCombineCompares.cpp [NFC] format InstructionSimplify & lowerCaseFunctionNames 2022-06-09 16:10:08 +02:00
InstCombineInternal.h [InstCombine] Push freeze through recurrence phi 2022-06-17 15:01:41 +02:00
InstCombineLoadStoreAlloca.cpp [APInt] Remove all uses of zextOrSelf, sextOrSelf and truncOrSelf 2022-05-19 11:23:13 +01:00
InstCombineMulDivRem.cpp [NFC] format InstructionSimplify & lowerCaseFunctionNames 2022-06-09 16:10:08 +02:00
InstCombineNegator.cpp [InstCombine] Fold sub(Y,and(lshr(X,C),1)) --> add(ashr(shl(X,(BW-1)-C),BW-1),Y) (PR53610) 2022-02-15 13:24:20 +00:00
InstCombinePHI.cpp [InstCombine] Improve check for catchswitch BBs (NFC) 2022-06-15 01:06:13 -07:00
InstCombineSelect.cpp [NFC][InstCombine] Refactor InstCombinerImpl::foldSelectIntoOp 2022-06-13 10:37:07 +01:00
InstCombineShifts.cpp [NFC] format InstructionSimplify & lowerCaseFunctionNames 2022-06-09 16:10:08 +02:00
InstCombineSimplifyDemanded.cpp [InstCombine] [InstCombine] reduce left-shift-of-right-shifted constant via demanded bits 2022-06-07 18:43:27 -04:00
InstCombineVectorOps.cpp [NFC] format InstructionSimplify & lowerCaseFunctionNames 2022-06-09 16:10:08 +02:00
InstructionCombining.cpp [InstCombine] Push freeze through recurrence phi 2022-06-17 15:01:41 +02:00