78b16ccf2b
This patch is trying to fix issue 48588(https://github.com/llvm/llvm-project/issues/48588) I found the results of Instruction Selection between SelectionDAG and FastISEL for the `%mul = mul i32 %A, 4294967295`: (seldag-isel) mul --> sub --> SUB32dp (fast-isel) mul --> sub --> NEG32d My patch to fix this issue is by overriding a virtual function M68kDAGToDAGISel::IsProfitableToFold(). Return `false` when it was trying to match with SUB, then it will match with NEG. Reviewed By: myhsu Differential Revision: https://reviews.llvm.org/D116886 |
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| .. | ||
| Alloc | ||
| Arith | ||
| CConv | ||
| CodeModel | ||
| Control | ||
| GlobalISel | ||
| ShiftRotate | ||
| CollapseMOVEM.mir | ||
| inline-asm.ll | ||
| is-pcrel-register-operand-legal.mir | ||
| lit.local.cfg | ||
| reserved-regs.ll | ||
| varargs.ll | ||