274 lines
7.6 KiB
LLVM
274 lines
7.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
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; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P9LE
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; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
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; RUN: -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P9BE
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; RUN: llc -mcpu=pwr8 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
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; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P8LE
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; RUN: llc -mcpu=pwr8 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
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; RUN: -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P8BE
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; Function Attrs: norecurse nounwind readonly
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define <2 x i64> @s2v_test1(i32* nocapture readonly %int32, <2 x i64> %vec) {
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; P9LE-LABEL: s2v_test1:
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; P9LE: # %bb.0: # %entry
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; P9LE-NEXT: lfiwax f0, 0, r3
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; P9LE-NEXT: xxmrghd v2, v2, vs0
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; P9LE-NEXT: blr
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;
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; P9BE-LABEL: s2v_test1:
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; P9BE: # %bb.0: # %entry
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; P9BE-NEXT: lfiwax f0, 0, r3
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; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
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; P9BE-NEXT: blr
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;
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; P8LE-LABEL: s2v_test1:
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; P8LE: # %bb.0: # %entry
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; P8LE-NEXT: lfiwax f0, 0, r3
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; P8LE-NEXT: xxmrghd v2, v2, vs0
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; P8LE-NEXT: blr
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;
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; P8BE-LABEL: s2v_test1:
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; P8BE: # %bb.0: # %entry
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; P8BE-NEXT: lfiwax f0, 0, r3
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; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
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; P8BE-NEXT: blr
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entry:
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%0 = load i32, i32* %int32, align 4
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%conv = sext i32 %0 to i64
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%vecins = insertelement <2 x i64> %vec, i64 %conv, i32 0
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ret <2 x i64> %vecins
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}
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; Function Attrs: norecurse nounwind readonly
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define <2 x i64> @s2v_test2(i32* nocapture readonly %int32, <2 x i64> %vec) {
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; P9LE-LABEL: s2v_test2:
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; P9LE: # %bb.0: # %entry
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; P9LE-NEXT: addi r3, r3, 4
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; P9LE-NEXT: lfiwax f0, 0, r3
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; P9LE-NEXT: xxmrghd v2, v2, vs0
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; P9LE-NEXT: blr
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;
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; P9BE-LABEL: s2v_test2:
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; P9BE: # %bb.0: # %entry
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; P9BE-NEXT: addi r3, r3, 4
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; P9BE-NEXT: lfiwax f0, 0, r3
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; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
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; P9BE-NEXT: blr
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;
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; P8LE-LABEL: s2v_test2:
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; P8LE: # %bb.0: # %entry
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; P8LE-NEXT: addi r3, r3, 4
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; P8LE-NEXT: lfiwax f0, 0, r3
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; P8LE-NEXT: xxmrghd v2, v2, vs0
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; P8LE-NEXT: blr
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;
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; P8BE-LABEL: s2v_test2:
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; P8BE: # %bb.0: # %entry
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; P8BE-NEXT: addi r3, r3, 4
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; P8BE-NEXT: lfiwax f0, 0, r3
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; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
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; P8BE-NEXT: blr
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entry:
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%arrayidx = getelementptr inbounds i32, i32* %int32, i64 1
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%0 = load i32, i32* %arrayidx, align 4
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%conv = sext i32 %0 to i64
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%vecins = insertelement <2 x i64> %vec, i64 %conv, i32 0
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ret <2 x i64> %vecins
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}
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; Function Attrs: norecurse nounwind readonly
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define <2 x i64> @s2v_test3(i32* nocapture readonly %int32, <2 x i64> %vec, i32 signext %Idx) {
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; P9LE-LABEL: s2v_test3:
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; P9LE: # %bb.0: # %entry
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; P9LE-NEXT: sldi r4, r7, 2
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; P9LE-NEXT: lfiwax f0, r3, r4
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; P9LE-NEXT: xxmrghd v2, v2, vs0
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; P9LE-NEXT: blr
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;
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; P9BE-LABEL: s2v_test3:
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; P9BE: # %bb.0: # %entry
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; P9BE-NEXT: sldi r4, r7, 2
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; P9BE-NEXT: lfiwax f0, r3, r4
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; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
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; P9BE-NEXT: blr
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;
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; P8LE-LABEL: s2v_test3:
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; P8LE: # %bb.0: # %entry
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; P8LE-NEXT: sldi r4, r7, 2
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; P8LE-NEXT: lfiwax f0, r3, r4
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; P8LE-NEXT: xxmrghd v2, v2, vs0
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; P8LE-NEXT: blr
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;
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; P8BE-LABEL: s2v_test3:
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; P8BE: # %bb.0: # %entry
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; P8BE-NEXT: sldi r4, r7, 2
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; P8BE-NEXT: lfiwax f0, r3, r4
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; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
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; P8BE-NEXT: blr
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entry:
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%idxprom = sext i32 %Idx to i64
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%arrayidx = getelementptr inbounds i32, i32* %int32, i64 %idxprom
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%0 = load i32, i32* %arrayidx, align 4
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%conv = sext i32 %0 to i64
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%vecins = insertelement <2 x i64> %vec, i64 %conv, i32 0
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ret <2 x i64> %vecins
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}
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; Function Attrs: norecurse nounwind readonly
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define <2 x i64> @s2v_test4(i32* nocapture readonly %int32, <2 x i64> %vec) {
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; P9LE-LABEL: s2v_test4:
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; P9LE: # %bb.0: # %entry
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; P9LE-NEXT: addi r3, r3, 4
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; P9LE-NEXT: lfiwax f0, 0, r3
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; P9LE-NEXT: xxmrghd v2, v2, vs0
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; P9LE-NEXT: blr
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;
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; P9BE-LABEL: s2v_test4:
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; P9BE: # %bb.0: # %entry
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; P9BE-NEXT: addi r3, r3, 4
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; P9BE-NEXT: lfiwax f0, 0, r3
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; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
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; P9BE-NEXT: blr
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;
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; P8LE-LABEL: s2v_test4:
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; P8LE: # %bb.0: # %entry
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; P8LE-NEXT: addi r3, r3, 4
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; P8LE-NEXT: lfiwax f0, 0, r3
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; P8LE-NEXT: xxmrghd v2, v2, vs0
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; P8LE-NEXT: blr
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;
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; P8BE-LABEL: s2v_test4:
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; P8BE: # %bb.0: # %entry
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; P8BE-NEXT: addi r3, r3, 4
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; P8BE-NEXT: lfiwax f0, 0, r3
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; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
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; P8BE-NEXT: blr
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entry:
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%arrayidx = getelementptr inbounds i32, i32* %int32, i64 1
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%0 = load i32, i32* %arrayidx, align 4
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%conv = sext i32 %0 to i64
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%vecins = insertelement <2 x i64> %vec, i64 %conv, i32 0
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ret <2 x i64> %vecins
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}
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; Function Attrs: norecurse nounwind readonly
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define <2 x i64> @s2v_test5(<2 x i64> %vec, i32* nocapture readonly %ptr1) {
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; P9LE-LABEL: s2v_test5:
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; P9LE: # %bb.0: # %entry
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; P9LE-NEXT: lfiwax f0, 0, r5
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; P9LE-NEXT: xxmrghd v2, v2, vs0
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; P9LE-NEXT: blr
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;
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; P9BE-LABEL: s2v_test5:
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; P9BE: # %bb.0: # %entry
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; P9BE-NEXT: lfiwax f0, 0, r5
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; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
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; P9BE-NEXT: blr
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;
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; P8LE-LABEL: s2v_test5:
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; P8LE: # %bb.0: # %entry
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; P8LE-NEXT: lfiwax f0, 0, r5
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; P8LE-NEXT: xxmrghd v2, v2, vs0
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; P8LE-NEXT: blr
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;
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; P8BE-LABEL: s2v_test5:
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; P8BE: # %bb.0: # %entry
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; P8BE-NEXT: lfiwax f0, 0, r5
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; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
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; P8BE-NEXT: blr
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entry:
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%0 = load i32, i32* %ptr1, align 4
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%conv = sext i32 %0 to i64
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%vecins = insertelement <2 x i64> %vec, i64 %conv, i32 0
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ret <2 x i64> %vecins
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}
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; Function Attrs: norecurse nounwind readonly
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define <2 x i64> @s2v_test6(i32* nocapture readonly %ptr) {
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; P9LE-LABEL: s2v_test6:
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; P9LE: # %bb.0: # %entry
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; P9LE-NEXT: lfiwax f0, 0, r3
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; P9LE-NEXT: xxspltd v2, f0, 0
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; P9LE-NEXT: blr
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;
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; P9BE-LABEL: s2v_test6:
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; P9BE: # %bb.0: # %entry
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; P9BE-NEXT: lfiwax f0, 0, r3
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; P9BE-NEXT: xxspltd v2, f0, 0
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; P9BE-NEXT: blr
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;
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; P8LE-LABEL: s2v_test6:
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; P8LE: # %bb.0: # %entry
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; P8LE-NEXT: lfiwax f0, 0, r3
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; P8LE-NEXT: xxspltd v2, f0, 0
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; P8LE-NEXT: blr
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;
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; P8BE-LABEL: s2v_test6:
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; P8BE: # %bb.0: # %entry
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; P8BE-NEXT: lfiwax f0, 0, r3
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; P8BE-NEXT: xxspltd v2, f0, 0
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; P8BE-NEXT: blr
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entry:
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%0 = load i32, i32* %ptr, align 4
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%conv = sext i32 %0 to i64
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%splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0
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%splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer
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ret <2 x i64> %splat.splat
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}
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; Function Attrs: norecurse nounwind readonly
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define <2 x i64> @s2v_test7(i32* nocapture readonly %ptr) {
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; P9LE-LABEL: s2v_test7:
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; P9LE: # %bb.0: # %entry
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; P9LE-NEXT: lfiwax f0, 0, r3
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; P9LE-NEXT: xxspltd v2, f0, 0
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; P9LE-NEXT: blr
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;
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; P9BE-LABEL: s2v_test7:
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; P9BE: # %bb.0: # %entry
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; P9BE-NEXT: lfiwax f0, 0, r3
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; P9BE-NEXT: xxspltd v2, f0, 0
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; P9BE-NEXT: blr
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;
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; P8LE-LABEL: s2v_test7:
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; P8LE: # %bb.0: # %entry
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; P8LE-NEXT: lfiwax f0, 0, r3
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; P8LE-NEXT: xxspltd v2, f0, 0
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; P8LE-NEXT: blr
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;
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; P8BE-LABEL: s2v_test7:
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; P8BE: # %bb.0: # %entry
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; P8BE-NEXT: lfiwax f0, 0, r3
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; P8BE-NEXT: xxspltd v2, f0, 0
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; P8BE-NEXT: blr
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entry:
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%0 = load i32, i32* %ptr, align 4
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%conv = sext i32 %0 to i64
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%splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0
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%splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer
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ret <2 x i64> %splat.splat
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}
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