36 lines
1.5 KiB
LLVM
36 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=-sse | FileCheck %s --check-prefix=X64-NOSSE
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; RUN: llc < %s -mtriple=x86_64-linux-generic -verify-machineinstrs | FileCheck %s --check-prefix=X64-SSE
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; Note: This test is testing that the lowering for atomics matches what we
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; currently emit for non-atomics + the atomic restriction. The presence of
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; particular lowering detail in these tests should not be read as requiring
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; that detail for correctness unless it's related to the atomicity itself.
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; (Specifically, there were reviewer questions about the lowering for halfs
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; and their calling convention which remain unresolved.)
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define void @store_fp128(fp128* %fptr, fp128 %v) {
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; X64-NOSSE-LABEL: store_fp128:
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; X64-NOSSE: # %bb.0:
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; X64-NOSSE-NEXT: pushq %rax
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; X64-NOSSE-NEXT: .cfi_def_cfa_offset 16
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; X64-NOSSE-NEXT: callq __sync_lock_test_and_set_16@PLT
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; X64-NOSSE-NEXT: popq %rax
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; X64-NOSSE-NEXT: .cfi_def_cfa_offset 8
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; X64-NOSSE-NEXT: retq
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;
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; X64-SSE-LABEL: store_fp128:
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; X64-SSE: # %bb.0:
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; X64-SSE-NEXT: subq $24, %rsp
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; X64-SSE-NEXT: .cfi_def_cfa_offset 32
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; X64-SSE-NEXT: movaps %xmm0, (%rsp)
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; X64-SSE-NEXT: movq (%rsp), %rsi
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; X64-SSE-NEXT: movq {{[0-9]+}}(%rsp), %rdx
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; X64-SSE-NEXT: callq __sync_lock_test_and_set_16@PLT
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; X64-SSE-NEXT: addq $24, %rsp
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; X64-SSE-NEXT: .cfi_def_cfa_offset 8
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; X64-SSE-NEXT: retq
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store atomic fp128 %v, fp128* %fptr unordered, align 16
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ret void
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}
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