649 lines
16 KiB
LLVM
649 lines
16 KiB
LLVM
; RUN: llc -verify-machineinstrs -O3 -mtriple=x86_64-apple-macosx -enable-implicit-null-checks < %s | FileCheck %s
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define i32 @imp_null_check_load(i32* %x) {
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; CHECK-LABEL: imp_null_check_load:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: Ltmp0:
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; CHECK-NEXT: movl (%rdi), %eax ## on-fault: LBB0_1
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB0_1: ## %is_null
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: retq
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entry:
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%c = icmp eq i32* %x, null
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br i1 %c, label %is_null, label %not_null, !make.implicit !0
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is_null:
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ret i32 42
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not_null:
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%t = load i32, i32* %x
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ret i32 %t
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}
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; TODO: can make implicit
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define i32 @imp_null_check_unordered_load(i32* %x) {
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; CHECK-LABEL: imp_null_check_unordered_load:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: Ltmp1:
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; CHECK-NEXT: movl (%rdi), %eax ## on-fault: LBB1_1
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB1_1: ## %is_null
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: retq
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entry:
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%c = icmp eq i32* %x, null
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br i1 %c, label %is_null, label %not_null, !make.implicit !0
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is_null:
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ret i32 42
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not_null:
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%t = load atomic i32, i32* %x unordered, align 4
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ret i32 %t
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}
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; TODO: Can be converted into implicit check.
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;; Probably could be implicit, but we're conservative for now
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define i32 @imp_null_check_seq_cst_load(i32* %x) {
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; CHECK-LABEL: imp_null_check_seq_cst_load:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: testq %rdi, %rdi
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; CHECK-NEXT: je LBB2_1
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: movl (%rdi), %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB2_1: ## %is_null
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: retq
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entry:
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%c = icmp eq i32* %x, null
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br i1 %c, label %is_null, label %not_null, !make.implicit !0
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is_null:
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ret i32 42
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not_null:
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%t = load atomic i32, i32* %x seq_cst, align 4
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ret i32 %t
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}
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;; Might be memory mapped IO, so can't rely on fault behavior
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define i32 @imp_null_check_volatile_load(i32* %x) {
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; CHECK-LABEL: imp_null_check_volatile_load:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: testq %rdi, %rdi
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; CHECK-NEXT: je LBB3_1
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: movl (%rdi), %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB3_1: ## %is_null
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: retq
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entry:
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%c = icmp eq i32* %x, null
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br i1 %c, label %is_null, label %not_null, !make.implicit !0
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is_null:
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ret i32 42
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not_null:
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%t = load volatile i32, i32* %x, align 4
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ret i32 %t
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}
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define i8 @imp_null_check_load_i8(i8* %x) {
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; CHECK-LABEL: imp_null_check_load_i8:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: Ltmp2:
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; CHECK-NEXT: movb (%rdi), %al ## on-fault: LBB4_1
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB4_1: ## %is_null
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; CHECK-NEXT: movb $42, %al
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; CHECK-NEXT: retq
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entry:
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%c = icmp eq i8* %x, null
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br i1 %c, label %is_null, label %not_null, !make.implicit !0
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is_null:
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ret i8 42
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not_null:
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%t = load i8, i8* %x
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ret i8 %t
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}
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define i256 @imp_null_check_load_i256(i256* %x) {
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; CHECK-LABEL: imp_null_check_load_i256:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: Ltmp3:
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; CHECK-NEXT: movq (%rsi), %rcx ## on-fault: LBB5_1
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: movq 8(%rsi), %rdx
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; CHECK-NEXT: movq 16(%rsi), %rdi
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; CHECK-NEXT: movq 24(%rsi), %rsi
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; CHECK-NEXT: movq %rsi, 24(%rax)
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; CHECK-NEXT: movq %rdi, 16(%rax)
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; CHECK-NEXT: movq %rdx, 8(%rax)
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; CHECK-NEXT: movq %rcx, (%rax)
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB5_1: ## %is_null
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; CHECK-NEXT: movq $0, 24(%rax)
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; CHECK-NEXT: movq $0, 16(%rax)
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; CHECK-NEXT: movq $0, 8(%rax)
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; CHECK-NEXT: movq $42, (%rax)
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; CHECK-NEXT: retq
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entry:
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%c = icmp eq i256* %x, null
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br i1 %c, label %is_null, label %not_null, !make.implicit !0
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is_null:
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ret i256 42
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not_null:
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%t = load i256, i256* %x
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ret i256 %t
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}
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define i32 @imp_null_check_gep_load(i32* %x) {
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; CHECK-LABEL: imp_null_check_gep_load:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: Ltmp4:
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; CHECK-NEXT: movl 128(%rdi), %eax ## on-fault: LBB6_1
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB6_1: ## %is_null
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: retq
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entry:
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%c = icmp eq i32* %x, null
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br i1 %c, label %is_null, label %not_null, !make.implicit !0
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is_null:
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ret i32 42
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not_null:
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%x.gep = getelementptr i32, i32* %x, i32 32
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%t = load i32, i32* %x.gep
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ret i32 %t
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}
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define i32 @imp_null_check_add_result(i32* %x, i32 %p) {
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; CHECK-LABEL: imp_null_check_add_result:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: Ltmp5:
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; CHECK-NEXT: addl (%rdi), %esi ## on-fault: LBB7_1
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: movl %esi, %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB7_1: ## %is_null
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: retq
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entry:
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%c = icmp eq i32* %x, null
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br i1 %c, label %is_null, label %not_null, !make.implicit !0
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is_null:
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ret i32 42
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not_null:
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%t = load i32, i32* %x
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%p1 = add i32 %t, %p
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ret i32 %p1
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}
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define i32 @imp_null_check_sub_result(i32* %x, i32 %p) {
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; CHECK-LABEL: imp_null_check_sub_result:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: Ltmp6:
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; CHECK-NEXT: movl (%rdi), %eax ## on-fault: LBB8_1
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: subl %esi, %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB8_1: ## %is_null
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: retq
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entry:
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%c = icmp eq i32* %x, null
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br i1 %c, label %is_null, label %not_null, !make.implicit !0
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is_null:
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ret i32 42
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not_null:
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%t = load i32, i32* %x
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%p1 = sub i32 %t, %p
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ret i32 %p1
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}
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define i32 @imp_null_check_mul_result(i32* %x, i32 %p) {
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; CHECK-LABEL: imp_null_check_mul_result:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: Ltmp7:
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; CHECK-NEXT: imull (%rdi), %esi ## on-fault: LBB9_1
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: movl %esi, %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB9_1: ## %is_null
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: retq
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entry:
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%c = icmp eq i32* %x, null
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br i1 %c, label %is_null, label %not_null, !make.implicit !0
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is_null:
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ret i32 42
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not_null:
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%t = load i32, i32* %x
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%p1 = mul i32 %t, %p
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ret i32 %p1
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}
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define i32 @imp_null_check_udiv_result(i32* %x, i32 %p) {
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; CHECK-LABEL: imp_null_check_udiv_result:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: Ltmp8:
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; CHECK-NEXT: movl (%rdi), %eax ## on-fault: LBB10_1
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: divl %esi
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB10_1: ## %is_null
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: retq
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entry:
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%c = icmp eq i32* %x, null
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br i1 %c, label %is_null, label %not_null, !make.implicit !0
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is_null:
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ret i32 42
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not_null:
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%t = load i32, i32* %x
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%p1 = udiv i32 %t, %p
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ret i32 %p1
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}
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define i32 @imp_null_check_shl_result(i32* %x, i32 %p) {
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; CHECK-LABEL: imp_null_check_shl_result:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: Ltmp9:
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; CHECK-NEXT: movl (%rdi), %eax ## on-fault: LBB11_1
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: shll %cl, %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB11_1: ## %is_null
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: retq
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entry:
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%c = icmp eq i32* %x, null
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br i1 %c, label %is_null, label %not_null, !make.implicit !0
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is_null:
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ret i32 42
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not_null:
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%t = load i32, i32* %x
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%p1 = shl i32 %t, %p
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ret i32 %p1
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}
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define i32 @imp_null_check_lshr_result(i32* %x, i32 %p) {
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; CHECK-LABEL: imp_null_check_lshr_result:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: Ltmp10:
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; CHECK-NEXT: movl (%rdi), %eax ## on-fault: LBB12_1
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: shrl %cl, %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB12_1: ## %is_null
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: retq
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entry:
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%c = icmp eq i32* %x, null
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br i1 %c, label %is_null, label %not_null, !make.implicit !0
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is_null:
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ret i32 42
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not_null:
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%t = load i32, i32* %x
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%p1 = lshr i32 %t, %p
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ret i32 %p1
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}
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define i32 @imp_null_check_hoist_over_unrelated_load(i32* %x, i32* %y, i32* %z) {
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; CHECK-LABEL: imp_null_check_hoist_over_unrelated_load:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: Ltmp11:
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; CHECK-NEXT: movl (%rdi), %eax ## on-fault: LBB13_1
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: movl (%rsi), %ecx
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; CHECK-NEXT: movl %ecx, (%rdx)
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB13_1: ## %is_null
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: retq
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entry:
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%c = icmp eq i32* %x, null
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br i1 %c, label %is_null, label %not_null, !make.implicit !0
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is_null:
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ret i32 42
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not_null:
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%t0 = load i32, i32* %y
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%t1 = load i32, i32* %x
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store i32 %t0, i32* %z
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ret i32 %t1
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}
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define i32 @imp_null_check_via_mem_comparision(i32* %x, i32 %val) {
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; CHECK-LABEL: imp_null_check_via_mem_comparision:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: Ltmp12:
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; CHECK-NEXT: cmpl %esi, 4(%rdi) ## on-fault: LBB14_3
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; CHECK-NEXT: ## %bb.1: ## %not_null
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; CHECK-NEXT: jge LBB14_2
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; CHECK-NEXT: ## %bb.4: ## %ret_100
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; CHECK-NEXT: movl $100, %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB14_3: ## %is_null
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB14_2: ## %ret_200
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; CHECK-NEXT: movl $200, %eax
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; CHECK-NEXT: retq
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entry:
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%c = icmp eq i32* %x, null
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br i1 %c, label %is_null, label %not_null, !make.implicit !0
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is_null:
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ret i32 42
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not_null:
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%x.loc = getelementptr i32, i32* %x, i32 1
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%t = load i32, i32* %x.loc
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%m = icmp slt i32 %t, %val
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br i1 %m, label %ret_100, label %ret_200
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ret_100:
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ret i32 100
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ret_200:
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ret i32 200
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}
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define i32 @imp_null_check_gep_load_with_use_dep(i32* %x, i32 %a) {
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; CHECK-LABEL: imp_null_check_gep_load_with_use_dep:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: ## kill: def $esi killed $esi def $rsi
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; CHECK-NEXT: Ltmp13:
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; CHECK-NEXT: movl (%rdi), %eax ## on-fault: LBB15_1
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: addl %edi, %esi
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; CHECK-NEXT: leal 4(%rax,%rsi), %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB15_1: ## %is_null
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: retq
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entry:
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%c = icmp eq i32* %x, null
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br i1 %c, label %is_null, label %not_null, !make.implicit !0
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is_null:
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ret i32 42
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not_null:
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%x.loc = getelementptr i32, i32* %x, i32 1
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%y = ptrtoint i32* %x.loc to i32
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%b = add i32 %a, %y
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%t = load i32, i32* %x
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%z = add i32 %t, %b
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ret i32 %z
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}
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;; TODO: We could handle this case as we can lift the fence into the
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;; previous block before the conditional without changing behavior.
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define i32 @imp_null_check_load_fence1(i32* %x) {
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; CHECK-LABEL: imp_null_check_load_fence1:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: testq %rdi, %rdi
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; CHECK-NEXT: je LBB16_1
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: ##MEMBARRIER
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; CHECK-NEXT: movl (%rdi), %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB16_1: ## %is_null
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: retq
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entry:
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%c = icmp eq i32* %x, null
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br i1 %c, label %is_null, label %not_null, !make.implicit !0
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is_null:
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ret i32 42
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not_null:
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fence acquire
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%t = load i32, i32* %x
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ret i32 %t
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}
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;; TODO: We could handle this case as we can lift the fence into the
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;; previous block before the conditional without changing behavior.
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define i32 @imp_null_check_load_fence2(i32* %x) {
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; CHECK-LABEL: imp_null_check_load_fence2:
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; CHECK: ## %bb.0: ## %entry
|
|
; CHECK-NEXT: testq %rdi, %rdi
|
|
; CHECK-NEXT: je LBB17_1
|
|
; CHECK-NEXT: ## %bb.2: ## %not_null
|
|
; CHECK-NEXT: mfence
|
|
; CHECK-NEXT: movl (%rdi), %eax
|
|
; CHECK-NEXT: retq
|
|
; CHECK-NEXT: LBB17_1: ## %is_null
|
|
; CHECK-NEXT: movl $42, %eax
|
|
; CHECK-NEXT: retq
|
|
|
|
entry:
|
|
%c = icmp eq i32* %x, null
|
|
br i1 %c, label %is_null, label %not_null, !make.implicit !0
|
|
|
|
is_null:
|
|
ret i32 42
|
|
|
|
not_null:
|
|
fence seq_cst
|
|
%t = load i32, i32* %x
|
|
ret i32 %t
|
|
}
|
|
|
|
define void @imp_null_check_store(i32* %x) {
|
|
; CHECK-LABEL: imp_null_check_store:
|
|
; CHECK: ## %bb.0: ## %entry
|
|
; CHECK-NEXT: Ltmp14:
|
|
; CHECK-NEXT: movl $1, (%rdi) ## on-fault: LBB18_1
|
|
; CHECK-NEXT: ## %bb.2: ## %not_null
|
|
; CHECK-NEXT: retq
|
|
; CHECK-NEXT: LBB18_1: ## %is_null
|
|
; CHECK-NEXT: retq
|
|
|
|
entry:
|
|
%c = icmp eq i32* %x, null
|
|
br i1 %c, label %is_null, label %not_null, !make.implicit !0
|
|
|
|
is_null:
|
|
ret void
|
|
|
|
not_null:
|
|
store i32 1, i32* %x
|
|
ret void
|
|
}
|
|
|
|
;; TODO: can be implicit
|
|
define void @imp_null_check_unordered_store(i32* %x) {
|
|
; CHECK-LABEL: imp_null_check_unordered_store:
|
|
; CHECK: ## %bb.0: ## %entry
|
|
; CHECK-NEXT: Ltmp15:
|
|
; CHECK-NEXT: movl $1, (%rdi) ## on-fault: LBB19_1
|
|
; CHECK-NEXT: ## %bb.2: ## %not_null
|
|
; CHECK-NEXT: retq
|
|
; CHECK-NEXT: LBB19_1: ## %is_null
|
|
; CHECK-NEXT: retq
|
|
|
|
entry:
|
|
%c = icmp eq i32* %x, null
|
|
br i1 %c, label %is_null, label %not_null, !make.implicit !0
|
|
|
|
is_null:
|
|
ret void
|
|
|
|
not_null:
|
|
store atomic i32 1, i32* %x unordered, align 4
|
|
ret void
|
|
}
|
|
|
|
define i32 @imp_null_check_neg_gep_load(i32* %x) {
|
|
; CHECK-LABEL: imp_null_check_neg_gep_load:
|
|
; CHECK: ## %bb.0: ## %entry
|
|
; CHECK-NEXT: Ltmp16:
|
|
; CHECK-NEXT: movl -128(%rdi), %eax ## on-fault: LBB20_1
|
|
; CHECK-NEXT: ## %bb.2: ## %not_null
|
|
; CHECK-NEXT: retq
|
|
; CHECK-NEXT: LBB20_1: ## %is_null
|
|
; CHECK-NEXT: movl $42, %eax
|
|
; CHECK-NEXT: retq
|
|
|
|
entry:
|
|
%c = icmp eq i32* %x, null
|
|
br i1 %c, label %is_null, label %not_null, !make.implicit !0
|
|
|
|
is_null:
|
|
ret i32 42
|
|
|
|
not_null:
|
|
%x.gep = getelementptr i32, i32* %x, i32 -32
|
|
%t = load i32, i32* %x.gep
|
|
ret i32 %t
|
|
}
|
|
|
|
; This redefines the null check reg by doing a zero-extend and a shift on
|
|
; itself.
|
|
; Converted into implicit null check since both of these operations do not
|
|
; change the nullness of %x (i.e. if it is null, it remains null).
|
|
define i64 @imp_null_check_load_shift_addr(i64* %x) {
|
|
; CHECK-LABEL: imp_null_check_load_shift_addr:
|
|
; CHECK: ## %bb.0: ## %entry
|
|
; CHECK-NEXT: shlq $6, %rdi
|
|
; CHECK-NEXT: Ltmp17:
|
|
; CHECK-NEXT: movq 8(%rdi), %rax ## on-fault: LBB21_1
|
|
; CHECK-NEXT: ## %bb.2: ## %not_null
|
|
; CHECK-NEXT: retq
|
|
; CHECK-NEXT: LBB21_1: ## %is_null
|
|
; CHECK-NEXT: movl $42, %eax
|
|
; CHECK-NEXT: retq
|
|
|
|
entry:
|
|
%c = icmp eq i64* %x, null
|
|
br i1 %c, label %is_null, label %not_null, !make.implicit !0
|
|
|
|
is_null:
|
|
ret i64 42
|
|
|
|
not_null:
|
|
%y = ptrtoint i64* %x to i64
|
|
%shry = shl i64 %y, 6
|
|
%y.ptr = inttoptr i64 %shry to i64*
|
|
%x.loc = getelementptr i64, i64* %y.ptr, i64 1
|
|
%t = load i64, i64* %x.loc
|
|
ret i64 %t
|
|
}
|
|
|
|
; Same as imp_null_check_load_shift_addr but shift is by 3 and this is now
|
|
; converted into complex addressing.
|
|
define i64 @imp_null_check_load_shift_by_3_addr(i64* %x) {
|
|
; CHECK-LABEL: imp_null_check_load_shift_by_3_addr:
|
|
; CHECK: ## %bb.0: ## %entry
|
|
; CHECK-NEXT: Ltmp18:
|
|
; CHECK-NEXT: movq 8(,%rdi,8), %rax ## on-fault: LBB22_1
|
|
; CHECK-NEXT: ## %bb.2: ## %not_null
|
|
; CHECK-NEXT: retq
|
|
; CHECK-NEXT: LBB22_1: ## %is_null
|
|
; CHECK-NEXT: movl $42, %eax
|
|
; CHECK-NEXT: retq
|
|
|
|
entry:
|
|
%c = icmp eq i64* %x, null
|
|
br i1 %c, label %is_null, label %not_null, !make.implicit !0
|
|
|
|
is_null:
|
|
ret i64 42
|
|
|
|
not_null:
|
|
%y = ptrtoint i64* %x to i64
|
|
%shry = shl i64 %y, 3
|
|
%y.ptr = inttoptr i64 %shry to i64*
|
|
%x.loc = getelementptr i64, i64* %y.ptr, i64 1
|
|
%t = load i64, i64* %x.loc
|
|
ret i64 %t
|
|
}
|
|
|
|
define i64 @imp_null_check_load_shift_add_addr(i64* %x) {
|
|
; CHECK-LABEL: imp_null_check_load_shift_add_addr:
|
|
; CHECK: ## %bb.0: ## %entry
|
|
; CHECK: movq 3526(,%rdi,8), %rax ## on-fault: LBB23_1
|
|
; CHECK-NEXT: ## %bb.2: ## %not_null
|
|
; CHECK-NEXT: retq
|
|
; CHECK-NEXT: LBB23_1: ## %is_null
|
|
; CHECK-NEXT: movl $42, %eax
|
|
; CHECK-NEXT: retq
|
|
|
|
entry:
|
|
%c = icmp eq i64* %x, null
|
|
br i1 %c, label %is_null, label %not_null, !make.implicit !0
|
|
|
|
is_null:
|
|
ret i64 42
|
|
|
|
not_null:
|
|
%y = ptrtoint i64* %x to i64
|
|
%shry = shl i64 %y, 3
|
|
%shry.add = add i64 %shry, 3518
|
|
%y.ptr = inttoptr i64 %shry.add to i64*
|
|
%x.loc = getelementptr i64, i64* %y.ptr, i64 1
|
|
%t = load i64, i64* %x.loc
|
|
ret i64 %t
|
|
}
|
|
!0 = !{}
|