154 lines
5.4 KiB
LLVM
154 lines
5.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=i386-unknown-unknown %s -o - | FileCheck --check-prefix=X86 %s
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; RUN: llc -mtriple=i386-unknown-unknown -relocation-model=pic %s -o -| FileCheck --check-prefix=X86PIC %s
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; Tests come from clang/test/CodeGen/ms-inline-asm-variables.c
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;
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; int gVar;
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; void t1() {
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; __asm add eax, dword ptr gVar[eax]
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; __asm add dword ptr [eax+gVar], eax
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; __asm add ebx, dword ptr gVar[271 - 82 + 81 + ebx]
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; __asm add dword ptr [ebx + gVar + 828], ebx
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; gVar = 3;
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; }
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;
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; void t2(void) {
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; int lVar;
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; __asm mov eax, dword ptr lVar[eax]
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; __asm mov dword ptr [eax+lVar], eax
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; __asm mov ebx, dword ptr lVar[271 - 82 + 81 + ebx]
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; __asm mov dword ptr [ebx + lVar + 828], ebx
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; __asm mov 5 + 8 + 13 + 21[lVar + ebx], eax
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; lVar = 2;
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; }
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@gVar = global i32 0, align 4
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; Function Attrs: noinline nounwind optnone uwtable
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define void @t1() #0 {
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; X86-LABEL: t1:
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; X86: # %bb.0: # %entry
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; X86-NEXT: pushl %ebp
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; X86-NEXT: .cfi_def_cfa_offset 8
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; X86-NEXT: .cfi_offset %ebp, -8
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; X86-NEXT: movl %esp, %ebp
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; X86-NEXT: .cfi_def_cfa_register %ebp
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; X86-NEXT: pushl %ebx
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; X86-NEXT: .cfi_offset %ebx, -12
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; X86-NEXT: #APP
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; X86-EMPTY:
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; X86-NEXT: addl gVar(%eax), %eax
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; X86-NEXT: addl %eax, gVar(%eax)
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; X86-NEXT: addl gVar+270(%ebx), %ebx
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; X86-NEXT: addl %ebx, gVar+828(%ebx)
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; X86-EMPTY:
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; X86-NEXT: #NO_APP
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; X86-NEXT: movl $3, gVar
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; X86-NEXT: popl %ebx
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; X86-NEXT: popl %ebp
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; X86-NEXT: .cfi_def_cfa %esp, 4
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; X86-NEXT: retl
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;
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; X86PIC-LABEL: t1:
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; X86PIC: # %bb.0: # %entry
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; X86PIC-NEXT: pushl %ebp
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; X86PIC-NEXT: .cfi_def_cfa_offset 8
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; X86PIC-NEXT: .cfi_offset %ebp, -8
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; X86PIC-NEXT: movl %esp, %ebp
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; X86PIC-NEXT: .cfi_def_cfa_register %ebp
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; X86PIC-NEXT: pushl %ebx
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; X86PIC-NEXT: .cfi_offset %ebx, -12
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; X86PIC-NEXT: calll .L0$pb
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; X86PIC-NEXT: .L0$pb:
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; X86PIC-NEXT: popl %ecx
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; X86PIC-NEXT: .Ltmp0:
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; X86PIC-NEXT: addl $_GLOBAL_OFFSET_TABLE_+(.Ltmp0-.L0$pb), %ecx
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; X86PIC-NEXT: movl gVar@GOT(%ecx), %edx
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; X86PIC-NEXT: #APP
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; X86PIC-EMPTY:
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; X86PIC-NEXT: addl (%edx,%eax), %eax
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; X86PIC-NEXT: addl %eax, (%edx,%eax)
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; X86PIC-NEXT: addl 270(%edx,%ebx), %ebx
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; X86PIC-NEXT: addl %ebx, 828(%edx,%ebx)
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; X86PIC-EMPTY:
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; X86PIC-NEXT: #NO_APP
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; X86PIC-NEXT: movl gVar@GOT(%ecx), %eax
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; X86PIC-NEXT: movl $3, (%eax)
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; X86PIC-NEXT: popl %ebx
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; X86PIC-NEXT: popl %ebp
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; X86PIC-NEXT: .cfi_def_cfa %esp, 4
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; X86PIC-NEXT: retl
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entry:
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call void asm sideeffect inteldialect "add eax, dword ptr $2[eax]\0A\09add dword ptr $0[eax], eax\0A\09add ebx, dword ptr $3[ebx + $$270]\0A\09add dword ptr $1[ebx + $$828], ebx", "=*m,=*m,*m,*m,~{eax},~{ebx},~{flags},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) @gVar, i32* elementtype(i32) @gVar, i32* elementtype(i32) @gVar, i32* elementtype(i32) @gVar)
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store i32 3, i32* @gVar, align 4
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ret void
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}
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; Function Attrs: noinline nounwind optnone uwtable
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define void @t2() #0 {
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; X86-LABEL: t2:
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; X86: # %bb.0: # %entry
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; X86-NEXT: pushl %ebp
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; X86-NEXT: .cfi_def_cfa_offset 8
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; X86-NEXT: .cfi_offset %ebp, -8
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; X86-NEXT: movl %esp, %ebp
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; X86-NEXT: .cfi_def_cfa_register %ebp
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; X86-NEXT: pushl %ebx
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; X86-NEXT: pushl %eax
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; X86-NEXT: .cfi_offset %ebx, -12
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; X86-NEXT: #APP
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; X86-EMPTY:
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; X86-NEXT: movl -8(%ebp,%eax), %eax
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; X86-NEXT: movl %eax, -8(%ebp,%eax)
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; X86-NEXT: movl 262(%ebp,%ebx), %ebx
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; X86-NEXT: movl %ebx, 820(%ebp,%ebx)
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; X86-NEXT: movl %eax, 39(%ebp,%ebx)
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; X86-EMPTY:
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; X86-NEXT: #NO_APP
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; X86-NEXT: movl $2, -8(%ebp)
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; X86-NEXT: addl $4, %esp
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; X86-NEXT: popl %ebx
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; X86-NEXT: popl %ebp
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; X86-NEXT: .cfi_def_cfa %esp, 4
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; X86-NEXT: retl
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;
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; X86PIC-LABEL: t2:
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; X86PIC: # %bb.0: # %entry
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; X86PIC-NEXT: pushl %ebp
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; X86PIC-NEXT: .cfi_def_cfa_offset 8
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; X86PIC-NEXT: .cfi_offset %ebp, -8
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; X86PIC-NEXT: movl %esp, %ebp
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; X86PIC-NEXT: .cfi_def_cfa_register %ebp
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; X86PIC-NEXT: pushl %ebx
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; X86PIC-NEXT: pushl %eax
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; X86PIC-NEXT: .cfi_offset %ebx, -12
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; X86PIC-NEXT: #APP
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; X86PIC-EMPTY:
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; X86PIC-NEXT: movl -8(%ebp,%eax), %eax
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; X86PIC-NEXT: movl %eax, -8(%ebp,%eax)
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; X86PIC-NEXT: movl 262(%ebp,%ebx), %ebx
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; X86PIC-NEXT: movl %ebx, 820(%ebp,%ebx)
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; X86PIC-NEXT: movl %eax, 39(%ebp,%ebx)
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; X86PIC-EMPTY:
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; X86PIC-NEXT: #NO_APP
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; X86PIC-NEXT: movl $2, -8(%ebp)
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; X86PIC-NEXT: addl $4, %esp
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; X86PIC-NEXT: popl %ebx
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; X86PIC-NEXT: popl %ebp
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; X86PIC-NEXT: .cfi_def_cfa %esp, 4
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; X86PIC-NEXT: retl
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entry:
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%lVar = alloca i32, align 4
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call void asm sideeffect inteldialect "mov eax, dword ptr $3[eax]\0A\09mov dword ptr $0[eax], eax\0A\09mov ebx, dword ptr $4[ebx + $$270]\0A\09mov dword ptr $1[ebx + $$828], ebx\0A\09mov $2[ebx + $$47], eax", "=*m,=*m,=*m,*m,*m,~{eax},~{ebx},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %lVar, i32* elementtype(i32) %lVar, i32* elementtype(i32) %lVar, i32* elementtype(i32) %lVar, i32* elementtype(i32) %lVar)
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store i32 2, i32* %lVar, align 4
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ret void
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}
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attributes #0 = { noinline nounwind optnone uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="pentium4" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
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attributes #1 = { nounwind }
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!llvm.module.flags = !{!0}
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!0 = !{i32 1, !"NumRegisterParameters", i32 0}
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