336 lines
		
	
	
		
			9.2 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			336 lines
		
	
	
		
			9.2 KiB
		
	
	
	
		
			LLVM
		
	
	
	
| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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| ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=CHECK,NOBMI
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| ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefixes=CHECK,BMI
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| 
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| ; InstCombine and DAGCombiner transform an 'add' into an 'or'
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| ; if there are no common bits from the incoming operands.
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| ; LEA instruction selection should be able to see through that
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| ; transform and reduce add/shift/or instruction counts.
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| 
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| define i32 @or_shift1_and1(i32 %x, i32 %y) {
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| ; CHECK-LABEL: or_shift1_and1:
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| ; CHECK:       # %bb.0:
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| ; CHECK-NEXT:    # kill: def $esi killed $esi def $rsi
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| ; CHECK-NEXT:    # kill: def $edi killed $edi def $rdi
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| ; CHECK-NEXT:    andl $1, %esi
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| ; CHECK-NEXT:    leal (%rsi,%rdi,2), %eax
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| ; CHECK-NEXT:    retq
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| 
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|   %shl = shl i32 %x, 1
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|   %and = and i32 %y, 1
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|   %or = or i32 %and, %shl
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|   ret i32 %or
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| }
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| 
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| define i32 @or_shift1_and1_swapped(i32 %x, i32 %y) {
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| ; CHECK-LABEL: or_shift1_and1_swapped:
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| ; CHECK:       # %bb.0:
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| ; CHECK-NEXT:    # kill: def $esi killed $esi def $rsi
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| ; CHECK-NEXT:    # kill: def $edi killed $edi def $rdi
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| ; CHECK-NEXT:    andl $1, %esi
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| ; CHECK-NEXT:    leal (%rsi,%rdi,2), %eax
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| ; CHECK-NEXT:    retq
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| 
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|   %shl = shl i32 %x, 1
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|   %and = and i32 %y, 1
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|   %or = or i32 %shl, %and
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|   ret i32 %or
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| }
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| 
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| define i32 @or_shift2_and1(i32 %x, i32 %y) {
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| ; CHECK-LABEL: or_shift2_and1:
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| ; CHECK:       # %bb.0:
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| ; CHECK-NEXT:    # kill: def $esi killed $esi def $rsi
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| ; CHECK-NEXT:    # kill: def $edi killed $edi def $rdi
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| ; CHECK-NEXT:    andl $1, %esi
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| ; CHECK-NEXT:    leal (%rsi,%rdi,4), %eax
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| ; CHECK-NEXT:    retq
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| 
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|   %shl = shl i32 %x, 2
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|   %and = and i32 %y, 1
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|   %or = or i32 %shl, %and
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|   ret i32 %or
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| }
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| 
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| define i32 @or_shift3_and1(i32 %x, i32 %y) {
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| ; CHECK-LABEL: or_shift3_and1:
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| ; CHECK:       # %bb.0:
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| ; CHECK-NEXT:    # kill: def $esi killed $esi def $rsi
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| ; CHECK-NEXT:    # kill: def $edi killed $edi def $rdi
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| ; CHECK-NEXT:    andl $1, %esi
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| ; CHECK-NEXT:    leal (%rsi,%rdi,8), %eax
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| ; CHECK-NEXT:    retq
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| 
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|   %shl = shl i32 %x, 3
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|   %and = and i32 %y, 1
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|   %or = or i32 %shl, %and
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|   ret i32 %or
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| }
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| 
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| define i32 @or_shift3_and7(i32 %x, i32 %y) {
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| ; CHECK-LABEL: or_shift3_and7:
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| ; CHECK:       # %bb.0:
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| ; CHECK-NEXT:    # kill: def $esi killed $esi def $rsi
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| ; CHECK-NEXT:    # kill: def $edi killed $edi def $rdi
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| ; CHECK-NEXT:    andl $7, %esi
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| ; CHECK-NEXT:    leal (%rsi,%rdi,8), %eax
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| ; CHECK-NEXT:    retq
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| 
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|   %shl = shl i32 %x, 3
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|   %and = and i32 %y, 7
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|   %or = or i32 %shl, %and
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|   ret i32 %or
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| }
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| 
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| ; The shift is too big for an LEA.
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| 
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| define i32 @or_shift4_and1(i32 %x, i32 %y) {
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| ; CHECK-LABEL: or_shift4_and1:
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| ; CHECK:       # %bb.0:
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| ; CHECK-NEXT:    # kill: def $esi killed $esi def $rsi
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| ; CHECK-NEXT:    # kill: def $edi killed $edi def $rdi
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| ; CHECK-NEXT:    shll $4, %edi
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| ; CHECK-NEXT:    andl $1, %esi
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| ; CHECK-NEXT:    leal (%rsi,%rdi), %eax
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| ; CHECK-NEXT:    retq
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| 
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|   %shl = shl i32 %x, 4
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|   %and = and i32 %y, 1
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|   %or = or i32 %shl, %and
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|   ret i32 %or
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| }
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| 
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| ; The mask is too big for the shift, so the 'or' isn't equivalent to an 'add'.
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| 
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| define i32 @or_shift3_and8(i32 %x, i32 %y) {
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| ; CHECK-LABEL: or_shift3_and8:
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| ; CHECK:       # %bb.0:
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| ; CHECK-NEXT:    # kill: def $edi killed $edi def $rdi
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| ; CHECK-NEXT:    leal (,%rdi,8), %eax
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| ; CHECK-NEXT:    andl $8, %esi
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| ; CHECK-NEXT:    orl %esi, %eax
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| ; CHECK-NEXT:    retq
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| 
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|   %shl = shl i32 %x, 3
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|   %and = and i32 %y, 8
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|   %or = or i32 %shl, %and
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|   ret i32 %or
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| }
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| 
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| ; 64-bit operands should work too.
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| 
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| define i64 @or_shift1_and1_64(i64 %x, i64 %y) {
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| ; CHECK-LABEL: or_shift1_and1_64:
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| ; CHECK:       # %bb.0:
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| ; CHECK-NEXT:    andl $1, %esi
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| ; CHECK-NEXT:    leaq (%rsi,%rdi,2), %rax
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| ; CHECK-NEXT:    retq
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| 
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|   %shl = shl i64 %x, 1
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|   %and = and i64 %y, 1
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|   %or = or i64 %and, %shl
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|   ret i64 %or
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| }
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| 
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| ; In the following patterns, lhs and rhs of the or instruction have no common bits.
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| 
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| define i32 @or_and_and_rhs_neg_i32(i32 %x, i32 %y, i32 %z) {
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| ; NOBMI-LABEL: or_and_and_rhs_neg_i32:
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| ; NOBMI:       # %bb.0: # %entry
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| ; NOBMI-NEXT:    # kill: def $edx killed $edx def $rdx
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| ; NOBMI-NEXT:    xorl %edi, %edx
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| ; NOBMI-NEXT:    andl %esi, %edx
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| ; NOBMI-NEXT:    xorl %edi, %edx
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| ; NOBMI-NEXT:    leal 1(%rdx), %eax
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| ; NOBMI-NEXT:    retq
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| ;
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| ; BMI-LABEL: or_and_and_rhs_neg_i32:
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| ; BMI:       # %bb.0: # %entry
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| ; BMI-NEXT:    # kill: def $edx killed $edx def $rdx
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| ; BMI-NEXT:    andl %esi, %edx
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| ; BMI-NEXT:    andnl %edi, %esi, %eax
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| ; BMI-NEXT:    leal 1(%rdx,%rax), %eax
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| ; BMI-NEXT:    retq
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| entry:
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|   %and1 = and i32 %z, %y
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|   %xor = xor i32 %y, -1
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|   %and2 = and i32 %x, %xor
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|   %or = or i32 %and1, %and2
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|   %inc = add i32 %or, 1
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|   ret i32 %inc
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| }
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| 
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| define i32 @or_and_and_lhs_neg_i32(i32 %x, i32 %y, i32 %z) {
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| ; NOBMI-LABEL: or_and_and_lhs_neg_i32:
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| ; NOBMI:       # %bb.0: # %entry
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| ; NOBMI-NEXT:    # kill: def $edx killed $edx def $rdx
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| ; NOBMI-NEXT:    xorl %edi, %edx
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| ; NOBMI-NEXT:    andl %esi, %edx
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| ; NOBMI-NEXT:    xorl %edi, %edx
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| ; NOBMI-NEXT:    leal 1(%rdx), %eax
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| ; NOBMI-NEXT:    retq
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| ;
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| ; BMI-LABEL: or_and_and_lhs_neg_i32:
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| ; BMI:       # %bb.0: # %entry
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| ; BMI-NEXT:    # kill: def $edx killed $edx def $rdx
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| ; BMI-NEXT:    andl %esi, %edx
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| ; BMI-NEXT:    andnl %edi, %esi, %eax
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| ; BMI-NEXT:    leal 1(%rdx,%rax), %eax
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| ; BMI-NEXT:    retq
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| entry:
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|   %and1 = and i32 %z, %y
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|   %xor = xor i32 %y, -1
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|   %and2 = and i32 %xor, %x
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|   %or = or i32 %and1, %and2
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|   %inc = add i32 %or, 1
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|   ret i32 %inc
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| }
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| 
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| define i32 @or_and_rhs_neg_and_i32(i32 %x, i32 %y, i32 %z) {
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| ; NOBMI-LABEL: or_and_rhs_neg_and_i32:
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| ; NOBMI:       # %bb.0: # %entry
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| ; NOBMI-NEXT:    # kill: def $edi killed $edi def $rdi
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| ; NOBMI-NEXT:    xorl %edx, %edi
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| ; NOBMI-NEXT:    andl %esi, %edi
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| ; NOBMI-NEXT:    xorl %edx, %edi
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| ; NOBMI-NEXT:    leal 1(%rdi), %eax
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| ; NOBMI-NEXT:    retq
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| ;
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| ; BMI-LABEL: or_and_rhs_neg_and_i32:
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| ; BMI:       # %bb.0: # %entry
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| ; BMI-NEXT:    # kill: def $edi killed $edi def $rdi
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| ; BMI-NEXT:    andnl %edx, %esi, %eax
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| ; BMI-NEXT:    andl %esi, %edi
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| ; BMI-NEXT:    leal 1(%rax,%rdi), %eax
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| ; BMI-NEXT:    retq
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| entry:
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|   %xor = xor i32 %y, -1
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|   %and1 = and i32 %z, %xor
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|   %and2 = and i32 %x, %y
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|   %or = or i32 %and1, %and2
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|   %inc = add i32 %or, 1
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|   ret i32 %inc
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| }
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| 
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| define i32 @or_and_lhs_neg_and_i32(i32 %x, i32 %y, i32 %z) {
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| ; NOBMI-LABEL: or_and_lhs_neg_and_i32:
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| ; NOBMI:       # %bb.0: # %entry
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| ; NOBMI-NEXT:    # kill: def $edi killed $edi def $rdi
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| ; NOBMI-NEXT:    xorl %edx, %edi
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| ; NOBMI-NEXT:    andl %esi, %edi
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| ; NOBMI-NEXT:    xorl %edx, %edi
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| ; NOBMI-NEXT:    leal 1(%rdi), %eax
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| ; NOBMI-NEXT:    retq
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| ;
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| ; BMI-LABEL: or_and_lhs_neg_and_i32:
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| ; BMI:       # %bb.0: # %entry
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| ; BMI-NEXT:    # kill: def $edi killed $edi def $rdi
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| ; BMI-NEXT:    andnl %edx, %esi, %eax
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| ; BMI-NEXT:    andl %esi, %edi
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| ; BMI-NEXT:    leal 1(%rax,%rdi), %eax
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| ; BMI-NEXT:    retq
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| entry:
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|   %xor = xor i32 %y, -1
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|   %and1 = and i32 %xor, %z
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|   %and2 = and i32 %x, %y
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|   %or = or i32 %and1, %and2
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|   %inc = add i32 %or, 1
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|   ret i32 %inc
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| }
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| 
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| define i64 @or_and_and_rhs_neg_i64(i64 %x, i64 %y, i64 %z) {
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| ; NOBMI-LABEL: or_and_and_rhs_neg_i64:
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| ; NOBMI:       # %bb.0: # %entry
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| ; NOBMI-NEXT:    xorq %rdi, %rdx
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| ; NOBMI-NEXT:    andq %rsi, %rdx
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| ; NOBMI-NEXT:    xorq %rdi, %rdx
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| ; NOBMI-NEXT:    leaq 1(%rdx), %rax
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| ; NOBMI-NEXT:    retq
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| ;
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| ; BMI-LABEL: or_and_and_rhs_neg_i64:
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| ; BMI:       # %bb.0: # %entry
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| ; BMI-NEXT:    andq %rsi, %rdx
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| ; BMI-NEXT:    andnq %rdi, %rsi, %rax
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| ; BMI-NEXT:    leaq 1(%rdx,%rax), %rax
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| ; BMI-NEXT:    retq
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| entry:
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|   %and1 = and i64 %z, %y
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|   %xor = xor i64 %y, -1
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|   %and2 = and i64 %x, %xor
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|   %or = or i64 %and1, %and2
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|   %inc = add i64 %or, 1
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|   ret i64 %inc
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| }
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| 
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| define i64 @or_and_and_lhs_neg_i64(i64 %x, i64 %y, i64 %z) {
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| ; NOBMI-LABEL: or_and_and_lhs_neg_i64:
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| ; NOBMI:       # %bb.0: # %entry
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| ; NOBMI-NEXT:    xorq %rdi, %rdx
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| ; NOBMI-NEXT:    andq %rsi, %rdx
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| ; NOBMI-NEXT:    xorq %rdi, %rdx
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| ; NOBMI-NEXT:    leaq 1(%rdx), %rax
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| ; NOBMI-NEXT:    retq
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| ;
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| ; BMI-LABEL: or_and_and_lhs_neg_i64:
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| ; BMI:       # %bb.0: # %entry
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| ; BMI-NEXT:    andq %rsi, %rdx
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| ; BMI-NEXT:    andnq %rdi, %rsi, %rax
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| ; BMI-NEXT:    leaq 1(%rdx,%rax), %rax
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| ; BMI-NEXT:    retq
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| entry:
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|   %and1 = and i64 %z, %y
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|   %xor = xor i64 %y, -1
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|   %and2 = and i64 %xor, %x
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|   %or = or i64 %and1, %and2
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|   %inc = add i64 %or, 1
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|   ret i64 %inc
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| }
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| 
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| define i64 @or_and_rhs_neg_and_i64(i64 %x, i64 %y, i64 %z) {
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| ; NOBMI-LABEL: or_and_rhs_neg_and_i64:
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| ; NOBMI:       # %bb.0: # %entry
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| ; NOBMI-NEXT:    xorq %rdx, %rdi
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| ; NOBMI-NEXT:    andq %rsi, %rdi
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| ; NOBMI-NEXT:    xorq %rdx, %rdi
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| ; NOBMI-NEXT:    leaq 1(%rdi), %rax
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| ; NOBMI-NEXT:    retq
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| ;
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| ; BMI-LABEL: or_and_rhs_neg_and_i64:
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| ; BMI:       # %bb.0: # %entry
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| ; BMI-NEXT:    andnq %rdx, %rsi, %rax
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| ; BMI-NEXT:    andq %rsi, %rdi
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| ; BMI-NEXT:    leaq 1(%rax,%rdi), %rax
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| ; BMI-NEXT:    retq
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| entry:
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|   %xor = xor i64 %y, -1
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|   %and1 = and i64 %z, %xor
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|   %and2 = and i64 %x, %y
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|   %or = or i64 %and1, %and2
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|   %inc = add i64 %or, 1
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|   ret i64 %inc
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| }
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| 
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| define i64 @or_and_lhs_neg_and_i64(i64 %x, i64 %y, i64 %z) {
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| ; NOBMI-LABEL: or_and_lhs_neg_and_i64:
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| ; NOBMI:       # %bb.0: # %entry
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| ; NOBMI-NEXT:    xorq %rdx, %rdi
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| ; NOBMI-NEXT:    andq %rsi, %rdi
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| ; NOBMI-NEXT:    xorq %rdx, %rdi
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| ; NOBMI-NEXT:    leaq 1(%rdi), %rax
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| ; NOBMI-NEXT:    retq
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| ;
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| ; BMI-LABEL: or_and_lhs_neg_and_i64:
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| ; BMI:       # %bb.0: # %entry
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| ; BMI-NEXT:    andnq %rdx, %rsi, %rax
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| ; BMI-NEXT:    andq %rsi, %rdi
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| ; BMI-NEXT:    leaq 1(%rax,%rdi), %rax
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| ; BMI-NEXT:    retq
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| entry:
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|   %xor = xor i64 %y, -1
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|   %and1 = and i64 %xor, %z
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|   %and2 = and i64 %x, %y
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|   %or = or i64 %and1, %and2
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|   %inc = add i64 %or, 1
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|   ret i64 %inc
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| }
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