139 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			139 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			LLVM
		
	
	
	
| ; RUN: llc -verify-machineinstrs -filetype=obj -o - -mtriple=x86_64-apple-macosx < %s | llvm-objdump --triple=x86_64-apple-macosx -d - | FileCheck %s
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| ; RUN: llc -verify-machineinstrs -mtriple=x86_64-apple-macosx < %s | FileCheck %s --check-prefix=CHECK-ALIGN
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| ; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=i386 < %s | FileCheck %s --check-prefixes=32,32CFI,XCHG
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| ; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=i386-windows-msvc < %s | FileCheck %s --check-prefixes=32,MOV
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| ; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=i386-windows-msvc -mcpu=pentium3 < %s | FileCheck %s --check-prefixes=32,MOV
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| ; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=i386-windows-msvc -mcpu=pentium4 < %s | FileCheck %s --check-prefixes=32,XCHG
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| ; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=x86_64-windows-msvc < %s | FileCheck %s --check-prefix=64
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| ; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=i386-unknown-linux-code16 < %s | FileCheck %s --check-prefix=16
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| 
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| ; 16-NOT: movl   %edi, %edi
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| ; 16-NOT: xchgw   %ax, %ax
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| 
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| declare void @callee(i64*)
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| 
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| define void @f0() "patchable-function"="prologue-short-redirect" {
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| ; CHECK-LABEL: _f0{{>?}}:
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| ; CHECK-NEXT:  66 90 	nop
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| 
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| ; CHECK-ALIGN: 	.p2align	4, 0x90
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| ; CHECK-ALIGN: _f0:
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| 
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| ; 32: f0:
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| ; 32CFI-NEXT: .cfi_startproc
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| ; 32-NEXT: # %bb.0:
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| ; XCHG-NEXT: xchgw   %ax, %ax                # encoding: [0x66,0x90]
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| ; MOV-NEXT: movl    %edi, %edi              # encoding: [0x8b,0xff]
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| ; 32-NEXT: retl
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| 
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| ; 64: f0:
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| ; 64-NEXT: # %bb.0:
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| ; 64-NEXT: xchgw   %ax, %ax                # encoding: [0x66,0x90]
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| ; 64-NEXT: retq
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| 		
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|   ret void
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| }
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| 
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| define void @f1() "patchable-function"="prologue-short-redirect" "frame-pointer"="all" {
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| ; CHECK-LABEL: _f1
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| ; CHECK-NEXT: ff f5 	pushq	%rbp
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| 
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| ; CHECK-ALIGN: 	.p2align	4, 0x90
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| ; CHECK-ALIGN: _f1:
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| 
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| ; 32: f1:
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| ; 32CFI-NEXT: .cfi_startproc
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| ; 32-NEXT: # %bb.0:
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| ; XCHG-NEXT: xchgw   %ax, %ax                # encoding: [0x66,0x90]
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| ; MOV-NEXT: movl    %edi, %edi              # encoding: [0x8b,0xff]
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| ; 32-NEXT: pushl   %ebp
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| 
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| ; 64: f1:
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| ; 64-NEXT: .seh_proc f1
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| ; 64-NEXT: # %bb.0:
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| ; 64-NEXT: pushq   %rbp
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| 		
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|   ret void
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| }
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| 
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| define void @f2() "patchable-function"="prologue-short-redirect" {
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| ; CHECK-LABEL: _f2
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| ; CHECK-NEXT: 48 81 ec a8 00 00 00 	subq	$168, %rsp
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| 
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| ; CHECK-ALIGN: 	.p2align	4, 0x90
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| ; CHECK-ALIGN: _f2:
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| 
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| ; 32: f2:
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| ; 32CFI-NEXT: .cfi_startproc
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| ; 32-NEXT: # %bb.0:
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| ; XCHG-NEXT: xchgw   %ax, %ax                # encoding: [0x66,0x90]
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| ; MOV-NEXT: movl    %edi, %edi              # encoding: [0x8b,0xff]
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| ; 32-NEXT: pushl   %ebp
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| 
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| ; 64: f2:
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| ; 64-NEXT: .seh_proc f2
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| ; 64-NEXT: # %bb.0:
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| ; 64-NEXT: subq    $200, %rsp
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| 		
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|   %ptr = alloca i64, i32 20
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|   call void @callee(i64* %ptr)
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|   ret void
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| }
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| 
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| define void @f3() "patchable-function"="prologue-short-redirect" optsize {
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| ; CHECK-LABEL: _f3
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| ; CHECK-NEXT: 66 90 	nop
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| 
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| ; CHECK-ALIGN: 	.p2align	4, 0x90
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| ; CHECK-ALIGN: _f3:
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| 
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| ; 32: f3:
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| ; 32CFI-NEXT: .cfi_startproc
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| ; 32-NEXT: # %bb.0:
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| ; XCHG-NEXT: xchgw   %ax, %ax
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| ; MOV-NEXT: movl   %edi, %edi
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| ; 32-NEXT: retl
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| 
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| ; 64: f3:
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| ; 64-NEXT: # %bb.0:
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| ; 64-NEXT: xchgw   %ax, %ax
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| ; 64-NEXT: retq
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| 
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|   ret void
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| }
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| 
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| ; This testcase happens to produce a KILL instruction at the beginning of the
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| ; first basic block. In this case the 2nd instruction should be turned into a
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| ; patchable one.
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| ; CHECK-LABEL: f4{{>?}}:
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| ; CHECK-NEXT: 8b 0c 37  movl  (%rdi,%rsi), %ecx
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| ; 32: f4:
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| ; 32CFI-NEXT: .cfi_startproc
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| ; 32-NEXT: # %bb.0:
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| ; XCHG-NEXT: xchgw   %ax, %ax
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| ; MOV-NEXT: movl   %edi, %edi
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| ; 32-NEXT: pushl   %ebx
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| 
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| ; 64: f4:
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| ; 64-NEXT: # %bb.0:
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| ; 64-NOT: xchgw   %ax, %ax
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| 
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| define i32 @f4(i8* %arg1, i64 %arg2, i32 %arg3) "patchable-function"="prologue-short-redirect" {
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| bb:
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|   %tmp10 = getelementptr i8, i8* %arg1, i64 %arg2
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|   %tmp11 = bitcast i8* %tmp10 to i32*
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|   %tmp12 = load i32, i32* %tmp11, align 4
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|   fence acquire
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|   %tmp13 = add i32 %tmp12, %arg3
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|   %tmp14 = cmpxchg i32* %tmp11, i32 %tmp12, i32 %tmp13 seq_cst monotonic
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|   %tmp15 = extractvalue { i32, i1 } %tmp14, 1
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|   br i1 %tmp15, label %bb21, label %bb16
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| 
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| bb16:
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|   br label %bb21
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| 
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| bb21:
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|   %tmp22 = phi i32 [ %tmp12, %bb ], [ %arg3, %bb16 ]
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|   ret i32 %tmp22
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| }
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