278 lines
8.2 KiB
LLVM
278 lines
8.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=instcombine -S | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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; %a is negative, %b is positive
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define i16 @oppositesign(i16 %x, i16 %y) {
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; CHECK-LABEL: @oppositesign(
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; CHECK-NEXT: [[A:%.*]] = or i16 [[X:%.*]], -32768
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; CHECK-NEXT: [[B:%.*]] = and i16 [[Y:%.*]], 32767
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; CHECK-NEXT: [[C:%.*]] = add nsw i16 [[A]], [[B]]
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; CHECK-NEXT: ret i16 [[C]]
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;
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%a = or i16 %x, 32768
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%b = and i16 %y, 32767
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%c = add i16 %a, %b
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ret i16 %c
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}
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define i16 @zero_sign_bit(i16 %a) {
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; CHECK-LABEL: @zero_sign_bit(
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; CHECK-NEXT: [[TMP1:%.*]] = and i16 [[A:%.*]], 32767
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; CHECK-NEXT: [[TMP2:%.*]] = add nuw i16 [[TMP1]], 512
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; CHECK-NEXT: ret i16 [[TMP2]]
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;
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%1 = and i16 %a, 32767
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%2 = add i16 %1, 512
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ret i16 %2
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}
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define i16 @zero_sign_bit2(i16 %a, i16 %b) {
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; CHECK-LABEL: @zero_sign_bit2(
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; CHECK-NEXT: [[TMP1:%.*]] = and i16 [[A:%.*]], 32767
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; CHECK-NEXT: [[TMP2:%.*]] = and i16 [[B:%.*]], 32767
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; CHECK-NEXT: [[TMP3:%.*]] = add nuw i16 [[TMP1]], [[TMP2]]
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; CHECK-NEXT: ret i16 [[TMP3]]
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;
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%1 = and i16 %a, 32767
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%2 = and i16 %b, 32767
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%3 = add i16 %1, %2
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ret i16 %3
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}
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declare i16 @bounded(i16 %input);
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declare i32 @__gxx_personality_v0(...);
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!0 = !{i16 0, i16 32768} ; [0, 32767]
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!1 = !{i16 0, i16 32769} ; [0, 32768]
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define i16 @add_bounded_values(i16 %a, i16 %b) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
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; CHECK-LABEL: @add_bounded_values(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[C:%.*]] = call i16 @bounded(i16 [[A:%.*]]), !range [[RNG0:![0-9]+]]
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; CHECK-NEXT: [[D:%.*]] = invoke i16 @bounded(i16 [[B:%.*]])
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; CHECK-NEXT: to label [[CONT:%.*]] unwind label [[LPAD:%.*]], !range [[RNG0]]
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; CHECK: cont:
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; CHECK-NEXT: [[E:%.*]] = add nuw i16 [[C]], [[D]]
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; CHECK-NEXT: ret i16 [[E]]
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; CHECK: lpad:
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; CHECK-NEXT: [[TMP0:%.*]] = landingpad { i8*, i32 }
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; CHECK-NEXT: filter [0 x i8*] zeroinitializer
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; CHECK-NEXT: ret i16 42
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;
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entry:
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%c = call i16 @bounded(i16 %a), !range !0
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%d = invoke i16 @bounded(i16 %b) to label %cont unwind label %lpad, !range !0
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cont:
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; %c and %d are in [0, 32767]. Therefore, %c + %d doesn't unsigned overflow.
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%e = add i16 %c, %d
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ret i16 %e
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lpad:
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%0 = landingpad { i8*, i32 }
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filter [0 x i8*] zeroinitializer
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ret i16 42
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}
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define i16 @add_bounded_values_2(i16 %a, i16 %b) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
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; CHECK-LABEL: @add_bounded_values_2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[C:%.*]] = call i16 @bounded(i16 [[A:%.*]]), !range [[RNG1:![0-9]+]]
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; CHECK-NEXT: [[D:%.*]] = invoke i16 @bounded(i16 [[B:%.*]])
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; CHECK-NEXT: to label [[CONT:%.*]] unwind label [[LPAD:%.*]], !range [[RNG1]]
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; CHECK: cont:
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; CHECK-NEXT: [[E:%.*]] = add i16 [[C]], [[D]]
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; CHECK-NEXT: ret i16 [[E]]
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; CHECK: lpad:
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; CHECK-NEXT: [[TMP0:%.*]] = landingpad { i8*, i32 }
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; CHECK-NEXT: filter [0 x i8*] zeroinitializer
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; CHECK-NEXT: ret i16 42
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;
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entry:
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%c = call i16 @bounded(i16 %a), !range !1
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%d = invoke i16 @bounded(i16 %b) to label %cont unwind label %lpad, !range !1
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cont:
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; Similar to add_bounded_values, but %c and %d are in [0, 32768]. Therefore,
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; %c + %d may unsigned overflow and we cannot add NUW.
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%e = add i16 %c, %d
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ret i16 %e
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lpad:
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%0 = landingpad { i8*, i32 }
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filter [0 x i8*] zeroinitializer
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ret i16 42
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}
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; %a has at most one bit set
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; %b has a 0 bit other than the sign bit
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define i16 @ripple_nsw1(i16 %x, i16 %y) {
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; CHECK-LABEL: @ripple_nsw1(
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; CHECK-NEXT: [[A:%.*]] = and i16 [[Y:%.*]], 1
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; CHECK-NEXT: [[B:%.*]] = and i16 [[X:%.*]], -16385
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; CHECK-NEXT: [[C:%.*]] = add nuw nsw i16 [[A]], [[B]]
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; CHECK-NEXT: ret i16 [[C]]
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;
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%a = and i16 %y, 1
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%b = and i16 %x, 49151
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%c = add i16 %a, %b
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ret i16 %c
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}
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; Like the previous test, but flip %a and %b
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define i16 @ripple_nsw2(i16 %x, i16 %y) {
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; CHECK-LABEL: @ripple_nsw2(
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; CHECK-NEXT: [[A:%.*]] = and i16 [[Y:%.*]], 1
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; CHECK-NEXT: [[B:%.*]] = and i16 [[X:%.*]], -16385
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; CHECK-NEXT: [[C:%.*]] = add nuw nsw i16 [[B]], [[A]]
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; CHECK-NEXT: ret i16 [[C]]
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;
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%a = and i16 %y, 1
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%b = and i16 %x, 49151
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%c = add i16 %b, %a
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ret i16 %c
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}
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define i16 @ripple_nsw3(i16 %x, i16 %y) {
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; CHECK-LABEL: @ripple_nsw3(
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; CHECK-NEXT: [[A:%.*]] = and i16 [[Y:%.*]], -21845
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; CHECK-NEXT: [[B:%.*]] = and i16 [[X:%.*]], 21843
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; CHECK-NEXT: [[C:%.*]] = add nuw nsw i16 [[A]], [[B]]
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; CHECK-NEXT: ret i16 [[C]]
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;
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%a = and i16 %y, 43691
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%b = and i16 %x, 21843
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%c = add i16 %a, %b
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ret i16 %c
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}
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; Like the previous test, but flip %a and %b
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define i16 @ripple_nsw4(i16 %x, i16 %y) {
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; CHECK-LABEL: @ripple_nsw4(
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; CHECK-NEXT: [[A:%.*]] = and i16 [[Y:%.*]], -21845
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; CHECK-NEXT: [[B:%.*]] = and i16 [[X:%.*]], 21843
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; CHECK-NEXT: [[C:%.*]] = add nuw nsw i16 [[B]], [[A]]
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; CHECK-NEXT: ret i16 [[C]]
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;
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%a = and i16 %y, 43691
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%b = and i16 %x, 21843
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%c = add i16 %b, %a
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ret i16 %c
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}
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define i16 @ripple_nsw5(i16 %x, i16 %y) {
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; CHECK-LABEL: @ripple_nsw5(
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; CHECK-NEXT: [[A:%.*]] = or i16 [[Y:%.*]], -21845
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; CHECK-NEXT: [[B:%.*]] = or i16 [[X:%.*]], -10923
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; CHECK-NEXT: [[C:%.*]] = add nsw i16 [[A]], [[B]]
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; CHECK-NEXT: ret i16 [[C]]
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;
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%a = or i16 %y, 43691
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%b = or i16 %x, 54613
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%c = add i16 %a, %b
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ret i16 %c
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}
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; Like the previous test, but flip %a and %b
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define i16 @ripple_nsw6(i16 %x, i16 %y) {
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; CHECK-LABEL: @ripple_nsw6(
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; CHECK-NEXT: [[A:%.*]] = or i16 [[Y:%.*]], -21845
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; CHECK-NEXT: [[B:%.*]] = or i16 [[X:%.*]], -10923
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; CHECK-NEXT: [[C:%.*]] = add nsw i16 [[B]], [[A]]
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; CHECK-NEXT: ret i16 [[C]]
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;
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%a = or i16 %y, 43691
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%b = or i16 %x, 54613
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%c = add i16 %b, %a
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ret i16 %c
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}
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; We know nothing about %x
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define i32 @ripple_no_nsw1(i32 %x, i32 %y) {
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; CHECK-LABEL: @ripple_no_nsw1(
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; CHECK-NEXT: [[A:%.*]] = and i32 [[Y:%.*]], 1
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; CHECK-NEXT: [[B:%.*]] = add i32 [[A]], [[X:%.*]]
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; CHECK-NEXT: ret i32 [[B]]
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;
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%a = and i32 %y, 1
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%b = add i32 %a, %x
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ret i32 %b
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}
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; %a has at most one bit set
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; %b has a 0 bit, but it is the sign bit
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define i16 @ripple_no_nsw2(i16 %x, i16 %y) {
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; CHECK-LABEL: @ripple_no_nsw2(
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; CHECK-NEXT: [[A:%.*]] = and i16 [[Y:%.*]], 1
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; CHECK-NEXT: [[B:%.*]] = and i16 [[X:%.*]], 32767
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; CHECK-NEXT: [[C:%.*]] = add nuw i16 [[A]], [[B]]
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; CHECK-NEXT: ret i16 [[C]]
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;
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%a = and i16 %y, 1
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%b = and i16 %x, 32767
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%c = add i16 %a, %b
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ret i16 %c
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}
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define i16 @ripple_no_nsw3(i16 %x, i16 %y) {
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; CHECK-LABEL: @ripple_no_nsw3(
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; CHECK-NEXT: [[A:%.*]] = and i16 [[Y:%.*]], -21845
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; CHECK-NEXT: [[B:%.*]] = and i16 [[X:%.*]], 21845
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; CHECK-NEXT: [[C:%.*]] = add i16 [[A]], [[B]]
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; CHECK-NEXT: ret i16 [[C]]
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;
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%a = and i16 %y, 43691
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%b = and i16 %x, 21845
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%c = add i16 %a, %b
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ret i16 %c
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}
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; Like the previous test, but flip %a and %b
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define i16 @ripple_no_nsw4(i16 %x, i16 %y) {
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; CHECK-LABEL: @ripple_no_nsw4(
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; CHECK-NEXT: [[A:%.*]] = and i16 [[Y:%.*]], -21845
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; CHECK-NEXT: [[B:%.*]] = and i16 [[X:%.*]], 21845
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; CHECK-NEXT: [[C:%.*]] = add i16 [[B]], [[A]]
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; CHECK-NEXT: ret i16 [[C]]
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;
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%a = and i16 %y, 43691
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%b = and i16 %x, 21845
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%c = add i16 %b, %a
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ret i16 %c
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}
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define i16 @ripple_no_nsw5(i16 %x, i16 %y) {
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; CHECK-LABEL: @ripple_no_nsw5(
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; CHECK-NEXT: [[A:%.*]] = or i16 [[Y:%.*]], -21847
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; CHECK-NEXT: [[B:%.*]] = or i16 [[X:%.*]], -10923
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; CHECK-NEXT: [[C:%.*]] = add i16 [[A]], [[B]]
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; CHECK-NEXT: ret i16 [[C]]
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;
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%a = or i16 %y, 43689
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%b = or i16 %x, 54613
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%c = add i16 %a, %b
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ret i16 %c
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}
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; Like the previous test, but flip %a and %b
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define i16 @ripple_no_nsw6(i16 %x, i16 %y) {
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; CHECK-LABEL: @ripple_no_nsw6(
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; CHECK-NEXT: [[A:%.*]] = or i16 [[Y:%.*]], -21847
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; CHECK-NEXT: [[B:%.*]] = or i16 [[X:%.*]], -10923
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; CHECK-NEXT: [[C:%.*]] = add i16 [[B]], [[A]]
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; CHECK-NEXT: ret i16 [[C]]
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;
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%a = or i16 %y, 43689
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%b = or i16 %x, 54613
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%c = add i16 %b, %a
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ret i16 %c
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}
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define i8 @PR38021(i8 %x) {
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; CHECK-LABEL: @PR38021(
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; CHECK-NEXT: [[CLEAR_TOP_3_BITS:%.*]] = lshr i8 [[X:%.*]], 3
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; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i8 [[CLEAR_TOP_3_BITS]], -63
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; CHECK-NEXT: ret i8 [[ADD]]
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;
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%clear_top_3_bits = lshr i8 %x, 3
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%add = add i8 %clear_top_3_bits, 193 ; 0b11000001
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ret i8 %add
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}
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