Craig Topper 2ae760e27e [RISCV] Add earlyclobber of destination register to vmsbf.m/vmsif.m/vmsof.m instructions ... The spec for these instructions include this note. "The destination register cannot overlap either the source register or the mask register ('v0') if the instruction is masked." So we need earlyclobber to enforce this constraint. I've regenerated the tests with update_llc_test_checks.py to show the effects of the earlyclobber. Reviewed By: khchen, frasercrmck Differential Revision: https://reviews.llvm.org/D93867		2020-12-29 10:00:04 -08:00
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AArch64	[AArch64] Fix legalization of i128 ctpop without neon	2020-12-27 17:24:41 +01:00
AMDGPU	[NewPM] Port infer-address-spaces	2020-12-28 19:58:12 -08:00
ARC	…
ARM	[ARM] Add some NEON anyextend testing. NFC	2020-12-27 13:18:10 +00:00
AVR	[AVR] Optimize the 16-bit NEGW pseudo instruction	2020-11-17 17:51:58 +08:00
BPF	[BPF] support atomic instructions	2020-12-03 07:38:00 -08:00
Generic	Moved dwarf_eh_resume.ll from Generic to X86 folder	2020-12-24 20:08:50 +07:00
Hexagon	[Hexagon] Rename test case, NFC	2020-12-15 19:05:31 -06:00
Inputs	…
Lanai	…
MIR	[MIRPrinter] Fix incorrect output of unnamed stack names	2020-12-28 18:01:40 +01:00
MSP430	OpaquePtr: Bulk update tests to use typed sret	2020-11-20 17:58:26 -05:00
Mips	Revert "[FastISel] Flush local value map on ever instruction" and dependent patches	2020-12-01 14:26:23 -08:00
NVPTX	OpaquePtr: Bulk update tests to use typed byval	2020-11-20 14:00:46 -05:00
PowerPC	[PowerPC] Provide patterns for permuted scalar to vector for pre-P8	2020-12-29 06:49:25 -06:00
RISCV	[RISCV] Add earlyclobber of destination register to vmsbf.m/vmsif.m/vmsof.m instructions	2020-12-29 10:00:04 -08:00
SPARC	[BPI] Improve static heuristics for "cold" paths.	2020-12-23 22:47:36 +07:00
SystemZ	[DAGCombiner] Don't create sexts of deleted xors when they were in-visit replaced	2020-12-23 16:16:26 -08:00
Thumb	OpaquePtr: Update more tests to use typed sret	2020-11-20 20:08:43 -05:00
Thumb2	[ARM] Add bank conflict hazarding	2020-12-23 14:00:59 +00:00
VE	[VE] Vector 'and' isel and tests	2020-12-23 13:29:29 +01:00
WebAssembly	[WebAssembly] Prototype extending pairwise add instructions	2020-12-28 14:11:14 -08:00
WinCFGuard	[CFGuard] Add address-taken IAT tables and delay-load support	2020-11-17 18:24:45 -08:00
WinEH	…
X86	Moved dwarf_eh_resume.ll from Generic to X86 folder	2020-12-24 20:08:50 +07:00
XCore	MCContext::reportError: don't call report_fatal_error	2020-12-20 23:23:12 -08:00