79 lines
2.9 KiB
LLVM
79 lines
2.9 KiB
LLVM
; RUN: llc -O0 -amdgpu-spill-sgpr-to-vgpr=1 -march=amdgcn -mattr=+vgpr-spilling -verify-machineinstrs < %s | FileCheck -check-prefix=TOVGPR -check-prefix=GCN %s
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; RUN: llc -O0 -amdgpu-spill-sgpr-to-vgpr=1 -march=amdgcn -mcpu=tonga -mattr=+vgpr-spilling -verify-machineinstrs < %s | FileCheck -check-prefix=TOVGPR -check-prefix=GCN %s
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; RUN: llc -O0 -amdgpu-spill-sgpr-to-vgpr=0 -march=amdgcn -mattr=+vgpr-spilling -verify-machineinstrs < %s | FileCheck -check-prefix=TOVMEM -check-prefix=GCN %s
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; RUN: llc -O0 -amdgpu-spill-sgpr-to-vgpr=0 -march=amdgcn -mattr=+vgpr-spilling -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=TOVMEM -check-prefix=GCN %s
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; XXX - Why does it like to use vcc?
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; GCN-LABEL: {{^}}spill_m0:
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; GCN: s_cmp_lg_i32
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; TOVGPR: s_mov_b32 vcc_hi, m0
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; TOVGPR: v_writelane_b32 [[SPILL_VREG:v[0-9]+]], vcc_hi, 0
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; TOVMEM: v_mov_b32_e32 [[SPILL_VREG:v[0-9]+]], m0
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; TOVMEM: buffer_store_dword [[SPILL_VREG]], off, s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} ; 4-byte Folded Spill
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; TOVMEM: s_waitcnt vmcnt(0)
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; GCN: s_cbranch_scc1 [[ENDIF:BB[0-9]+_[0-9]+]]
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; GCN: [[ENDIF]]:
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; TOVGPR: v_readlane_b32 vcc_hi, [[SPILL_VREG]], 0
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; TOVGPR: s_mov_b32 m0, vcc_hi
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; TOVMEM: buffer_load_dword [[RELOAD_VREG:v[0-9]+]], off, s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} ; 4-byte Folded Reload
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; TOVMEM: s_waitcnt vmcnt(0)
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; TOVMEM: v_readfirstlane_b32 vcc_hi, [[RELOAD_VREG]]
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; TOVMEM: s_mov_b32 m0, vcc_hi
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; GCN: s_add_i32 m0, m0, 1
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define void @spill_m0(i32 %cond, i32 addrspace(1)* %out) #0 {
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entry:
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%m0 = call i32 asm sideeffect "s_mov_b32 m0, 0", "={M0}"() #0
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%cmp0 = icmp eq i32 %cond, 0
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br i1 %cmp0, label %if, label %endif
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if:
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call void asm sideeffect "v_nop", ""() #0
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br label %endif
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endif:
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%foo = call i32 asm sideeffect "s_add_i32 $0, $1, 1", "=s,{M0}"(i32 %m0) #0
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store i32 %foo, i32 addrspace(1)* %out
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ret void
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}
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@lds = internal addrspace(3) global [64 x float] undef
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; GCN-LABEL: {{^}}spill_m0_lds:
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; GCN-NOT: v_readlane_b32 m0
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define amdgpu_ps void @spill_m0_lds(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg) #0 {
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main_body:
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%4 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
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%cmp = fcmp ueq float 0.0, %4
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br i1 %cmp, label %if, label %else
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if:
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%lds_ptr = getelementptr [64 x float], [64 x float] addrspace(3)* @lds, i32 0, i32 0
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%lds_data = load float, float addrspace(3)* %lds_ptr
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br label %endif
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else:
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%interp = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
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br label %endif
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endif:
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%export = phi float [%lds_data, %if], [%interp, %else]
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%5 = call i32 @llvm.SI.packf16(float %export, float %export)
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%6 = bitcast i32 %5 to float
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %6, float %6, float %6, float %6)
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ret void
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}
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declare float @llvm.SI.fs.constant(i32, i32, i32) readnone
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declare i32 @llvm.SI.packf16(float, float) readnone
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declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
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attributes #0 = { nounwind }
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