155 lines
4.0 KiB
LLVM
155 lines
4.0 KiB
LLVM
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
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; Test that basic 32-bit floating-point operations assemble as expected.
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target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
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target triple = "wasm32-unknown-unknown"
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declare float @llvm.fabs.f32(float)
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declare float @llvm.copysign.f32(float, float)
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declare float @llvm.sqrt.f32(float)
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declare float @llvm.ceil.f32(float)
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declare float @llvm.floor.f32(float)
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declare float @llvm.trunc.f32(float)
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declare float @llvm.nearbyint.f32(float)
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declare float @llvm.rint.f32(float)
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declare float @llvm.fma.f32(float, float, float)
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; CHECK-LABEL: fadd32:
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; CHECK-NEXT: .param f32, f32{{$}}
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; CHECK-NEXT: .result f32{{$}}
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; CHECK-NEXT: f32.add $push0=, $0, $1{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define float @fadd32(float %x, float %y) {
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%a = fadd float %x, %y
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ret float %a
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}
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; CHECK-LABEL: fsub32:
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; CHECK: f32.sub $push0=, $0, $1{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define float @fsub32(float %x, float %y) {
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%a = fsub float %x, %y
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ret float %a
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}
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; CHECK-LABEL: fmul32:
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; CHECK: f32.mul $push0=, $0, $1{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define float @fmul32(float %x, float %y) {
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%a = fmul float %x, %y
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ret float %a
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}
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; CHECK-LABEL: fdiv32:
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; CHECK: f32.div $push0=, $0, $1{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define float @fdiv32(float %x, float %y) {
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%a = fdiv float %x, %y
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ret float %a
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}
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; CHECK-LABEL: fabs32:
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; CHECK: f32.abs $push0=, $0{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define float @fabs32(float %x) {
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%a = call float @llvm.fabs.f32(float %x)
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ret float %a
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}
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; CHECK-LABEL: fneg32:
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; CHECK: f32.neg $push0=, $0{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define float @fneg32(float %x) {
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%a = fsub float -0., %x
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ret float %a
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}
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; CHECK-LABEL: copysign32:
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; CHECK: f32.copysign $push0=, $0, $1{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define float @copysign32(float %x, float %y) {
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%a = call float @llvm.copysign.f32(float %x, float %y)
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ret float %a
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}
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; CHECK-LABEL: sqrt32:
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; CHECK: f32.sqrt $push0=, $0{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define float @sqrt32(float %x) {
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%a = call float @llvm.sqrt.f32(float %x)
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ret float %a
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}
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; CHECK-LABEL: ceil32:
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; CHECK: f32.ceil $push0=, $0{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define float @ceil32(float %x) {
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%a = call float @llvm.ceil.f32(float %x)
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ret float %a
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}
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; CHECK-LABEL: floor32:
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; CHECK: f32.floor $push0=, $0{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define float @floor32(float %x) {
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%a = call float @llvm.floor.f32(float %x)
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ret float %a
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}
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; CHECK-LABEL: trunc32:
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; CHECK: f32.trunc $push0=, $0{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define float @trunc32(float %x) {
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%a = call float @llvm.trunc.f32(float %x)
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ret float %a
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}
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; CHECK-LABEL: nearest32:
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; CHECK: f32.nearest $push0=, $0{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define float @nearest32(float %x) {
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%a = call float @llvm.nearbyint.f32(float %x)
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ret float %a
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}
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; CHECK-LABEL: nearest32_via_rint:
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; CHECK: f32.nearest $push0=, $0{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define float @nearest32_via_rint(float %x) {
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%a = call float @llvm.rint.f32(float %x)
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ret float %a
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}
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; Min and max tests. LLVM currently only forms fminnan and fmaxnan nodes in
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; cases where there's a single fcmp with a select and it can prove that one
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; of the arms is never NaN, so we only test that case. In the future if LLVM
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; learns to form fminnan/fmaxnan in more cases, we can write more general
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; tests.
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; CHECK-LABEL: fmin32:
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; CHECK: f32.min $push1=, $0, $pop0{{$}}
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; CHECK-NEXT: return $pop1{{$}}
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define float @fmin32(float %x) {
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%a = fcmp ult float %x, 0.0
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%b = select i1 %a, float %x, float 0.0
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ret float %b
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}
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; CHECK-LABEL: fmax32:
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; CHECK: f32.max $push1=, $0, $pop0{{$}}
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; CHECK-NEXT: return $pop1{{$}}
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define float @fmax32(float %x) {
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%a = fcmp ugt float %x, 0.0
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%b = select i1 %a, float %x, float 0.0
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ret float %b
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}
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; CHECK-LABEL: fma32:
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; CHECK: {{^}} f32.call $push0=, fmaf@FUNCTION, $0, $1, $2{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define float @fma32(float %a, float %b, float %c) {
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%d = call float @llvm.fma.f32(float %a, float %b, float %c)
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ret float %d
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}
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