113 lines
		
	
	
		
			3.3 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			113 lines
		
	
	
		
			3.3 KiB
		
	
	
	
		
			LLVM
		
	
	
	
| ; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=sse2 < %s | FileCheck %s --check-prefix=SSE
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| ; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=avx2 < %s | FileCheck %s --check-prefix=AVX
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| 
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| ; Verify that 128-bit vector logical ops are reassociated.
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| 
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| define <4 x i32> @reassociate_and_v4i32(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2, <4 x i32> %x3) {
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| ; SSE-LABEL: reassociate_and_v4i32:
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| ; SSE:       # BB#0:
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| ; SSE-NEXT:    paddd %xmm1, %xmm0
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| ; SSE-NEXT:    pand %xmm3, %xmm2
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| ; SSE-NEXT:    pand %xmm2, %xmm0
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| ; SSE-NEXT:    retq
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| ;
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| ; AVX-LABEL: reassociate_and_v4i32:
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| ; AVX:       # BB#0:
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| ; AVX-NEXT:    vpaddd %xmm1, %xmm0, %xmm0
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| ; AVX-NEXT:    vpand %xmm3, %xmm2, %xmm1
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| ; AVX-NEXT:    vpand %xmm1, %xmm0, %xmm0
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| ; AVX-NEXT:    retq
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| 
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|   %t0 = add <4 x i32> %x0, %x1
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|   %t1 = and <4 x i32> %x2, %t0
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|   %t2 = and <4 x i32> %x3, %t1
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|   ret <4 x i32> %t2
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| }
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| 
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| define <4 x i32> @reassociate_or_v4i32(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2, <4 x i32> %x3) {
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| ; SSE-LABEL: reassociate_or_v4i32:
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| ; SSE:       # BB#0:
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| ; SSE-NEXT:    paddd %xmm1, %xmm0
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| ; SSE-NEXT:    por %xmm3, %xmm2
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| ; SSE-NEXT:    por %xmm2, %xmm0
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| ; SSE-NEXT:    retq
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| ;
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| ; AVX-LABEL: reassociate_or_v4i32:
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| ; AVX:       # BB#0:
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| ; AVX-NEXT:    vpaddd %xmm1, %xmm0, %xmm0
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| ; AVX-NEXT:    vpor %xmm3, %xmm2, %xmm1
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| ; AVX-NEXT:    vpor %xmm1, %xmm0, %xmm0
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| ; AVX-NEXT:    retq
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| 
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|   %t0 = add <4 x i32> %x0, %x1
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|   %t1 = or <4 x i32> %x2, %t0
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|   %t2 = or <4 x i32> %x3, %t1
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|   ret <4 x i32> %t2
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| }
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| 
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| define <4 x i32> @reassociate_xor_v4i32(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2, <4 x i32> %x3) {
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| ; SSE-LABEL: reassociate_xor_v4i32:
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| ; SSE:       # BB#0:
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| ; SSE-NEXT:    paddd %xmm1, %xmm0
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| ; SSE-NEXT:    pxor %xmm3, %xmm2
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| ; SSE-NEXT:    pxor %xmm2, %xmm0
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| ; SSE-NEXT:    retq
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| ;
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| ; AVX-LABEL: reassociate_xor_v4i32:
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| ; AVX:       # BB#0:
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| ; AVX-NEXT:    vpaddd %xmm1, %xmm0, %xmm0
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| ; AVX-NEXT:    vpxor %xmm3, %xmm2, %xmm1
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| ; AVX-NEXT:    vpxor %xmm1, %xmm0, %xmm0
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| ; AVX-NEXT:    retq
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| 
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|   %t0 = add <4 x i32> %x0, %x1
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|   %t1 = xor <4 x i32> %x2, %t0
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|   %t2 = xor <4 x i32> %x3, %t1
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|   ret <4 x i32> %t2
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| }
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| 
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| ; Verify that 256-bit vector logical ops are reassociated.
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| 
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| define <8 x i32> @reassociate_and_v8i32(<8 x i32> %x0, <8 x i32> %x1, <8 x i32> %x2, <8 x i32> %x3) {
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| ; AVX-LABEL: reassociate_and_v8i32:
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| ; AVX:       # BB#0:
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| ; AVX-NEXT:    vpaddd %ymm1, %ymm0, %ymm0
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| ; AVX-NEXT:    vpand %ymm3, %ymm2, %ymm1
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| ; AVX-NEXT:    vpand %ymm1, %ymm0, %ymm0
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| ; AVX-NEXT:    retq
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| 
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|   %t0 = add <8 x i32> %x0, %x1
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|   %t1 = and <8 x i32> %x2, %t0
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|   %t2 = and <8 x i32> %x3, %t1
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|   ret <8 x i32> %t2
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| }
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| 
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| define <8 x i32> @reassociate_or_v8i32(<8 x i32> %x0, <8 x i32> %x1, <8 x i32> %x2, <8 x i32> %x3) {
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| ; AVX-LABEL: reassociate_or_v8i32:
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| ; AVX:       # BB#0:
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| ; AVX-NEXT:    vpaddd %ymm1, %ymm0, %ymm0
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| ; AVX-NEXT:    vpor %ymm3, %ymm2, %ymm1
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| ; AVX-NEXT:    vpor %ymm1, %ymm0, %ymm0
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| ; AVX-NEXT:    retq
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| 
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|   %t0 = add <8 x i32> %x0, %x1
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|   %t1 = or <8 x i32> %x2, %t0
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|   %t2 = or <8 x i32> %x3, %t1
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|   ret <8 x i32> %t2
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| }
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| 
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| define <8 x i32> @reassociate_xor_v8i32(<8 x i32> %x0, <8 x i32> %x1, <8 x i32> %x2, <8 x i32> %x3) {
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| ; AVX-LABEL: reassociate_xor_v8i32:
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| ; AVX:       # BB#0:
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| ; AVX-NEXT:    vpaddd %ymm1, %ymm0, %ymm0
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| ; AVX-NEXT:    vpxor %ymm3, %ymm2, %ymm1
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| ; AVX-NEXT:    vpxor %ymm1, %ymm0, %ymm0
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| ; AVX-NEXT:    retq
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| 
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|   %t0 = add <8 x i32> %x0, %x1
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|   %t1 = xor <8 x i32> %x2, %t0
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|   %t2 = xor <8 x i32> %x3, %t1
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|   ret <8 x i32> %t2
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| }
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| 
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